On 10:58 PM 15/08/2001 +1200, Simon Peacock said:
>Just put the split plane on top.. simple :)
>
>Simon
>
>
>  --- [EMAIL PROTECTED] wrote: > I've got a multi
>layer board, which is almost
> > completed. The problem is we
> > started it with solid planes. Now the engineer wants
> > me to use split
> > planes.
> >
> > How do I delete the plane layers, and start new
> > split layer board.
> >

Simon is dead right but maybe a little more info would not go astray. :-)

You say you have "plane layers" - are these Internal planes or are they 
signal planes with polygon pours?

Internal planes are negative layers - that is where you put a track will 
have *no* copper.  To make a split plane all you need to do is add a closed 
shape of tracks to isolate an island of copper.  This island can then carry 
a different voltage to the main plane that exists all around.  Protel adds 
formal support for split planes by allowing you to create the close shape 
and nominate what net you wish the island to connect to.

So - to place a split plane all one need to is decide which internal plane 
layer it is to exist on, choose the track size, select the net and then 
place vertices where you want them.

Internal planes are not deleted - you just decide to use them or not.  The 
exist over the whole workspace from 0,0 to 100"x100".  When you place a 
split plane on the layer you are removing a section of the dominant plane 
and associating it with a different net to the rest of that layer. Since 
the internal plane exists everywhere, it is usually considered important to 
place a track around the edge of the board outline to pull back the plane 
by a mm or so. This is to prevent accidental shorts between layers when 
cropping/routing the PCB, (due to tiny copper whiskers). Simply copying and 
pasting the board outline onto any enabled internal plane layers and 
setting their widths to 50 mils does a fine job of this.

Typically, a split plane design would have the main power net associated 
with the internal plane layer (using the Layer Stack Manager) and then one 
or more smaller split planes placed on that layer using Place|Split Plane...

If however you have implemented the power planes as polygon pours on a 
signal layer then you will need to be a little more careful but in essence 
you should make the outer polygon wrap around the split plane and then use 
fills and tracks to bridge the gap in the out polygon pour.  Do not try to 
have one polygon simply existing inside the main outer polygon as you get 
all sorts of variability in the result depending upon which polygon is 
poured first.  I have not explained very well.  Ask for more info if you 
are using poly pours on a signal layer.

Expect some discussion on the use of split planes.  Especially the EMC 
implications of this.  Basic rule - do not have any high speed signals 
cross a split plane boundary - or if you do try to make the either the 
supply of the GND internal planes non-split and use the unsplit plane to 
isolate the high speed tracks from the split plane.  Split planes are 
sometimes EMC generators - I have been burnt (once, but that was 
enough).  I am now using local supply regulation where possible to minimise 
the requirements to tracking large number of heavy power signals. In the 
case of low noise supply being isolated from a noisy digital supply (but at 
the same voltage) I tend to use a few open tracks on the internal plane to 
control current paths to keep the analog ground "locally" clean.

All the best,
Ian Wilson

Bye for now,
Ian Wilson

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