Terry Harris wrote:

> On Wed, 22 Aug 2001 16:24:37 -0500, Tim Hutcheson wrote:
>
> >Since my source resistance is 53 ohms, I have less than 2% mismatch.
>
> Just to inject a little reality here. Board houses can not control layer
> thickness to anything like 2%. The can mic up the cores and maybe get close
> to what you want but prepreg layers it depends how long, how hot, and how
> hard they squeeze them in the press.

Fortunately, a 2% variation in dielectric thickness makes less than a 2% change

in characteristic impedance.  Especially with low impedances (like ~50 Ohms)
the fringe effects are pretty dominant, and small changes in height and
thickness
don't make that much of a difference.  Anyway, trying to get down to a 2%
mismatch in digital designs is pretty tough.

> Add to that the dielectric constant of FR4 is variable by about 10% and
> varies over commercial temperature range by about another 10%.
>
> Then I doubt they can give you 5 mil tracks within 10% and what is the
> actual effective track width when it is under etched at an angle anyway?
>
> So yes it is wise to aim for what you worked out but expect your mismatch
> to be more like +/-20%

If you set the nominal impedance carefully, you canhopefully stay within 10%
even with all these variations in process adding up.

> You could put some test traces outside the board and find a board house
> with (an expensive) impedance analyser - expect that to be expensive
> because if the impedance isn't right all they can do is scrap and start
> again.

Or, you can do this testing yourself, run prototypes and then tell them that
the production boards need to measure just like the prototype, or they don't
meet spec.  I think you'd be able to find a board houst that could keep things
within 10% of the characteristic impedance pretty well.

Jon

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