On 05:05 PM 30/08/2001 -0500, Robison Michael R CNIN said:
>well, from looking the netlist over and comparing it to the schematic
>i did, it looks like you're not allowed to have more than one net name
>per node.  that is gonna hurt.  i tried to reproduce the schematic in
>protel as close as possible to the original to reduce errors.  so now
>i've got an 11 page schematic that is filled with multi-netted nodes
>which are not being interpretted in protel as i meant them to be.
>
>miker


You are correct, as rlamoreaux pointed out, Protel will choose one net name.

You have a few options:
1) Change all but one of the net labels (per node) to an annotation (simple 
text) rather than a net label (but make sure the real net label appears on 
every segment of that net)
2) Use a full hierarchical design and then flatten it before you go to PCB 
- I think this is not a good method though.
3) Rework the sch so there is only one sensible net name per net - this is 
the best method I think.

I can not understand why, for a flat design, why anyone would want more 
than one net label on a net.  Maybe it is because I have to debug the 
boards I do as well as lay them out and design them. I would get totally 
frustrated in debugging any board where the net changed from sheet to 
sheet.  It is one wire so it has one name - that is my philosophy.  I, 
personally, do not have a beef with Protel only supporting (sensibly) one 
name per net, but others may disagree.

(When I was first starting to lay out PCB and enter Schematics a few moons 
ago :-)  - it never struck me that you would ever want anything but 
one-name-per-net.  I guess complex hierarchical designs have a need for 
multiple net-labels on nets but still only one net name per net on each 
page, and you then get maintainability problems with Protel as you have to 
flatten the design before xferring info into the PCB.)

I would suggest reworking the Sch carefully, to make it one label per 
net.  But as I say others may disagree.

Ian Wilson

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