Nicely put ABD... 
I didn't attempt to address the cap placement issue because I am not
familiar with his design...But as a general rule I put bypass caps as close
as I can to the lead of the IC that needs decoupling and drop a via to the
ground plane as close as possible to the CAP foot print pad. 
My other suggestion was made without having known about the "No-connect"
option in the plane connect rules... That's a nice feature... It does reduce
the possibility of having a confusion over the DRC error problem. Thanks

Bill Brooks 
PCB Design Engineer , C.I.D.
3030 Enterprise Court 
Vista, CA 92083 
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 
IPC Designers Council, San Diego Chapter

-----Original Message-----
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Thursday, November 29, 2001 10:19 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Padstack

At 10:55 AM 11/29/01 -0500, Wesley Webb wrote:

>Can anyone tell me if it is possible make a via or pad that is connected 
>to the Vcc net on the top and bottom layers only. TI do not want to 
>connect it to the inner Vcc plane as the decoupling caps are on the 
>secondary side of the pcb and I want the voltage to see them before the 
>leg of the IC.

First of all, normally the best strategy for improving high-speed 
performance is to minimize the inductance of the connections. The strategy 
described has been discredited. For best results, I recommend allowing the 
vias to connect, and they should be direct connect. It is often, also, not 
worthwhile to run stringers to the bypass cap, as I have often seen, indeed 
I used to do myself. I had the same idea as Mr. Webb. It was a bad idea.

With a multilayer board, the best source of clean bypassed power is the 
plane structure, particularly if the stackup has been designed to minimize 
the distance between the plane, 5 mils of prepreg is a common figure, so 
that the distributed capacitance is large. But even with more widely 
separated planes, it would be better to connect the vias to the plane.

So I now place vias as close as possible to the cap pads; I'd put them in 
the pads if it did not cause manufacturing problems. I leave just a very 
short distance of space between the cap pad and the via to create a thermal 
relief. I do the same with the component pads.

However, if the engineer still wants to disconnect the vias from the plane 
for some reason -- after all, that's what engineers are for -- use a Design 
Rule for plane connection.

Use a pad instead of a via (you can use vias but the specification of the 
via is less flexible. Place one of the pads and give it some distinctive 
and descriptive name like "NO-PLANE". Then open up the design rule dialog 

Filter Kind should be Component-Pad. The pad will be, in the list, 
"-NO-PLANE", i.e., the component refdes will be a null string. Select it. 
Set connection style for No-Connect.

If you already have placed vias, select them all by any of the various 
means. Then use Tools/Convert/Vias to Free Pads, then globally edit on 
selected pads to give them the distinctive name.

You can set many different kinds of custom handling of "vias" using this 
technique. You can make some vias direct-connect and some no-connect, and I 
think you can control this by layer....

Abdulrahman Lomax
Easthampton, Massachusetts USA

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