Have you tried talking to lattice, they can be very helpful....

Lattice changed their programming method from a proprietory system
to JTAG about five years ago (perhaps more).

As far as I know they still support the non-E variants of the
1000 series, at least is there in the V3.0 of their ISP document that I
have. That came with a recent programmer.

I know they also support both programming methods on all but their newest
chips.

My V8.4 of Lattice Design Expert still supports the 1016.

I can't see what use Protel would be in this? Its true that it does have a
built in CUPL programming language with a schematic front end. (not that
i've ever used it, ABLE and VHDL cover all my needs).
Protel though still won't turn your JEDEC file back into a logical drawing.

The ISPLSI 1016 is the simplest isp device that lattice made (before they
bought AMD's/Vantis's PLDs), it might be posible (with patience) to turn the
download file back into a logical description of the function of the device.

I believe that lattice publish the 'fuse map' format for the devices, the
only task is to reference that back to the resources in the chip.

Or depending what the design does, can you re-draw/write it? Design Expert
is FREE, its much better to have the design files rather than just the
jedec.

Good Luck,

Jason.

-----Original Message-----
From: Georg Beckmann [mailto:[EMAIL PROTECTED]]
Sent: 17 January 2002 06:49
To: 'Protel EDA Forum'
Subject: [PEDA] Lattice pld



Sorry, if this is a bit off topic,

I have to program iSPLSI 1016  devices from lattice. The design was made
long
ago ( 1993 ) and I have a valid jed - file.

Lattice sells only the update of the iSPLSI 1016 called iSPLSI 1016E.

My programmer detects a wrong device and can't program it.
So I tried to use the in circuit feature to program it, but the same. The
devices
must have a different signature so that the jedec cannot be used.

If ever possible, I don't want to go back to the source files and start all
over again in a design process.

If I have to do so, is it possible with the protel PLD part ?

Georg


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