I would suggest a closer look at the reflow profiling - despite the
claims of "optimum" profile. What I would look at in particular is the
soak time (or bottom side preheat if the oven supports this).

At a distance, my guess would be that the top side of the board is
getting to correct temperature, but the bottom side is staying too
cool. I would run a thermal profile pass with thermocouples attached
to both the top and bottom surfaces of the PCB.

BTW, does the board contain numbers of large inflexible components
like PLCCs?

Another test: if you run two bare boards through reflow, with one
"top" facing up and the other facing down, do both boards warp in
the same direction, or is it always toward the "top" (or "bottom",
as the case may be). The former would point to a reflow issue, while
the latter would be related to board fab/design.

John Haddy

> -----Original Message-----
> From: Jason Morgan [mailto:[EMAIL PROTECTED]]
> Sent: Friday, 5 April 2002 1:40 AM
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Thanks for all the advice and suggestions.
>
> Some more info that I missed from the first post:
>
> We've been trying to solve this for some time. We've tried boards supplied
> from more than one house and populated at more than one house,
> all with the
> same sorts of results.
>
> We're not the fab, so we have no control on the process, its up
> to their QA.
>
> The profile is optimum (according to fab) and any change would
> result in bad
> joints.
>
> We've tried reflow and wave with the same or similar results.
>
> We've tried with and without components with the same or similar results.
>
> So the component layout and thermal profile probably are not to blame.
>
> It must be the board design or the results of that combined with the
> conventional layup for such a design.
>
> I can't say who designed the rack, but to our knowlege their own cards fit
> into the rack OK - even though our samples are twisted to a small degree.
>
> We're prepared to try adding hashing to the inner layers - it
> seems logical,
> but as the PCB house seem not to be sure we don't want to spend
> the money on
> a run without all the available information (it costs 2k for each run).
>
> I'll keep you all informed of the solution and the outcome, thanks once
> again for all the help.
>
> Jason
>
>
> -----Original Message-----
> From: Jon Elson [mailto:[EMAIL PROTECTED]]
> Sent: 03 April 2002 21:53
> To: Protel EDA Forum
> Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Jason Morgan wrote:
>
> > Many thanks,
> >
> > Details are as follows:
> >
> > 6 Layer 1.6 FR4
> > 8" x 10" Board
> >
> > PCB support is a wasted rectangle 10mm wide along all edges, supporting
> PCB
> > at 2 or 3 points along each edge.  (First observation is that
> this should
> > have copper layers)
>
> A number of different ways to even out copper coverage on layers on
> opposing sides of board were mentioned, and these are probably aimed
> at solving residual stresses left in the board.  That sounds good, but may
> be difficult to accomplish, dpending on board density, etc.
>
> One thing that comes to mind is that the boards come out of the laminating
> press flat, go through all the additional steps in PCB fabrication OK, but
> then warp when YOU process them to attach components.  Are you sure
> you have to heat the boards as hot, for as long as you are doing, to get
> good soldering?  That may have something to do with it.
>
> Finally, could you give the boards some mechanical support during
> the reflow
> soldering?  Making some simple metal frames that hold the board edges
> during the entire time it is heated might keep them flat as they cool.
>
> Jon
>

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this list visit:
* http://www.techservinc.com/protelusers/leave.html
*
* Contact the list manager:
* mailto:[EMAIL PROTECTED]
*
* Forum Guidelines Rules:
* http://www.techservinc.com/protelusers/forumrules.html
*
* Browse or Search previous postings:
* http://www.mail-archive.com/proteledaforum@techservinc.com
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

Reply via email to