www.intusoft.com has some helpful technical articles about SPICE.
(You have to register to download them)
I wish Protel would offer more help for simulation ...
One article describes in general convergence problems with some circuits and
their causes (something like 'converg.pdf').
The 'timestep to small' can have several reasons (GMIN, ABSTOL, RELTOL ...)
but you can try to work with a fixed timestep instead of letting SPICE
calculate its own (and have to go too small). The relevant article advises a
'TRTOL=100' (large steps) and a maximum timestep for the transient analysis
to 1/10 to 1/100 of the cycle time (limited steps), what nails the timestep
to the declared maximum. It helped me out in some situations, particularly
in some circuits with positiv feedback (like comparators).

Rolf Molitor
Ing.Buero i2e
Remscheid / Germany



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