I have tried to reproduce this behaviour by creating a schematic symbol which is associated with footprint "BLANK". No ERC errors in the schematic. Generating a PCB using "PCB WIZARD" and using "UPDATE PCB" does not cause a problem. The updated PCB displays two of 6 components (not including the "BLANK") the rest are not visible. "FIT BOARD" and "FIT DOCUMENT" causes a zoom to maximum size (100000mil). With designators and comments hidden the two visible components can be selected and moved. With either designators or comments unhidden attempting to move either of the visible components causes a selection choice of the visible component and "BLANK". Selecting in free space selects "BLANK". Hiding Designators and comments, then using "MOVE COMPONENT" and "SELECT COMPONENT" with move component to cursor selected all components except "BLANK" were moved to within the PCB outline. "FIT BOARD" and "FIT DOCUMENT" now behave as normal.
Looks like a "BLANK" creates a very large invisible footprint. Hope someone finds this useful. I can send the .ddb to anyone if interested. Thanks, Dave Buckley -----Original Message----- From: Ian Wilson [mailto:[EMAIL PROTECTED]] Sent: 18 April 2002 00:03 To: Protel EDA Forum Subject: Re: [PEDA] FW: Access violation -- Is it a Protel bug? On 02:40 PM 17/04/2002 -0700, Shuping Lew said: >I use some notes on every schematic project. So I created a schematic symbol >named "note" for it. To avoid the warning of missing footprint, I also >created a footprint named "blank" to associate with that symbol. For some >reason, Protel does not like the footprint "Blank"(there is not primitive on >the footprint at all). I deleted component "note" from the netlist, it seems >ok now... > >Shuping Interesting - can this be validated (if someone validates I will add to the bug list). Proposed entry (if validated): Summary: PCB:Netlist load specifying a footprint with no primitives causes access violation. Details: PCB 99SE SP6 A netlist load which includes a footprint with no entities (a completely blank PCB footprint) can cause an access violation during netlist load. This does not affect the synchroniser. Workaround: Completely blank footprints should be avoided. Protel should make netlist import bullet-proof such that any file, even complete binary garbage, should not cause a crash. Reported by: Shuping Lew Validated by:.... I would especially like validation that this indeed the only way of triggering the issue or whether it requires other conditions as well such as large number of components, multiple instances of the blank component (maybe all with the same or possibly blank ref designators). Also, checking what the effects of the blank footprint on the board is (is it reported in BOM, does it affect Zoom-ALL). Maybe there is another bug in that a blank footprint causes the database to become unstable in some fashion. As per usual, I will do the database if others put in some time on the validation, thanks. Ian Wilson * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
