Hello, The first thing that I did was to search for chip on board on the internet. The second and probably the most important thing I did was talk to a couple of board houses regarding pad center to pad center spacing (if testing is required), and minimum pad size and via in pad. A couple of other items are that you will need another mask layer for "Selective Hard Gold Plating", and you need to be sure to have a pad connected to the correct net for the die. Be aware of current issues; some applications require wire bond pads be porpotional to the die pads to allow for more than one wire bond.
I would also be interested to hear any thing any one else has to say on this subject. Cheers! Drew ----- Original Message ----- From: <Luo>; "Yu-Ming (ù¥É¯ú IAC-N)" <[EMAIL PROTECTED]> To: "Protel EDA Forum" <[EMAIL PROTECTED]> Sent: Thursday, May 16, 2002 9:08 PM Subject: [PEDA] COB Layout Information > Hi, > > Can anyone share your experiences on COB (Chip On Board) design or tell me > where to find the relevant information? Thanks a lot! > > Regards, > Luo. > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *