At 12:10 PM 6/7/2002 -0400, Richard Sumner wrote:
>You might simply add the mating connector pair to the schematic, and run 
>all required signals through both connectors. No net name changes needed. 
>Everything else is done in pcb layout. You end up with one board design 
>which is designed to break in two. You would wind up with some traces 
>going right to the board edge (the lines between the 2 connector parts). 
>To avoid this, delete these few trace segments after the board passes drc. 
>Then you will get a few broken net errors.

For this kind of application, one might create a dummy Mid copper layer on 
which these traces are placed. That layer is eliminated from the gerber 
plot set, in the CAM definitions, so it does not plot. But DRC will think 
that the boards are connected, so there will be no error created.

However, my own preference might be to split the schematic and to design 
two separate PCBs. They could later be combined back into one board, which 
would be specially easy if the reference designators are not duplicated. 
Only if one wanted to fab both boards as a set on the same panel would the 
above be what I would suggest.

To split the schematic, I would probably use hierarchical scope and handle 
the interconnections on the top level. That way, the whole project can be 
ERCd, etc., and the same schematic will be ready for final production.

To make the two separate boards, the next level down from the top would 
consist of two schematics, I'll call them A.sch and B.sch, each one of 
which might be complete or it might be the top level of a lower hierarchy. 
By simply making a project out of each of the two schematics, one would 
have the separate schematic for each PCB.

The sheet symbols for each sublevel would be placed on the appropriate A or 
B schematic. The connectors would also be on the A and B schematics, not on 
the top level; the top level would have only two sheet symbols and 
interconnecting wiring. For clarity, that wiring should be given 
descriptive net names, since in hierarchical schematics, nets are only 
named from the top level on which they occur.

In the final combined version, the connectors would simply be deleted, 
unless one wanted to keep them or their footprints on the boards.


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