Can't wave solder as the thermal contact areas need to be flat with gold
over nickel plating. Also got BGA.

Examples of copper flood fill for thermal cooling can be seen here:-
http://www.radstone.co.uk/html/PRODUCTS/pmcfa1r.html

Regards

Ian


> -----Original Message-----
> From: Danny Bishop [mailto:[EMAIL PROTECTED]]
> Sent: 25 August 2002 23:27
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] Copper fill for thermal reason.
>
>
> hi Ian
>
> interesting requirements. What is the application, and  what sort of
> temperature levels and stability do you require?
>
> Why do you need to connect the thermal areas to system EARTH (is
> this power
> earth, if so you will be trying to cool rather a large thermal mass!)
>
> I will be monitoring to see what people say about the EMC implications -
> much of it will come down to how noisy the two earths are, and the
> implications of the extra capacitive coupling that you will get. Are you
> thickening up the copper on the outside layers (where you require good
> thermal conduction)?
>
> I have done a bit of this, in both a highly critical scientific
> application,
> as well as in a mainstream industrial application where we just
> had to keep
> things cool (under difficult design constraints)
>
> It may be useful also for you to wave solder the board, as this
> will fill up
> untented vias and greatly increase thermal conduction. I may also be
> tempting to investigate leaving some or all of the thermal areas un-masked
> to thicken up these areas with solder, again to provide better thermal
> conductivity.
>
> cheers
>
> > -----Original Message-----
> > From: Ian Middleton [mailto:[EMAIL PROTECTED]]
> > Sent: Friday, 23 August 2002 10:46 PM
> > To: Protel EDA Forum
> > Subject: [PEDA] Copper fill for thermal reason.
> >
> >
> > I have a 6 layer board (S-P-S-S-P-S) that is to be used in a
> > conduction
> > cooled environment. It has heat "thermal interface areas" on
> > the component
> > side that mate with heat spreaders in the system. These
> > thermal areas are
> > electrically connected to system EARTH and not the PCB electical GND.
> >
> > We have been recommended to flood copper fill the component
> > and solder side
> > (connected to EARTH, using a generous 10mil gap) to ensure
> > greater thermal
> > conductivity and to connect the two fills with many vias.
> >
> > Obviously there are going to be areas of copper that are
> > "dead" and will be
> > removed by the "Remove dead copper" option on the Polygon
> > Plane Options.
> >
> > Can anyone suggest any problems (EMC, signal integrity etc)
> > with adding
> > extra tracks (and polygons) on other PCB layers to connect
> > these "dead"
> > areas to the EARTH net thus stoping them being removed ?
> >
> > Ian
> >
> >
> > **************************************************************
> > **********
> > * Tracking #: ECAA00D1A8D2584D86EE4B9D0C52A2AE0F0B998E
> > *
> > **************************************************************
> > **********
> >
>

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