Hello All,
 
I have been trying to figure out how to fix a minor problem with DRC in PCB. I built a 
144-SODIMM footprint with a rectangluar topoverlay around it. Because of my board 
size, I needed to make use of all the space available including the free space area of 
the SODIMM footprint. Everytime I move another footprint into the SODIMM's free area, 
I get DRC (component spacing errors). How can I setup the design rule to ignore these 
components.
 
Best Regards,
Loc Tran


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