Hello, all,

Is anyone using the PLD compiler in P99SE (SP6)? I just ran into a problem
having to do with the generation of equations for tri-state OBUFs. It seems to
be the same problem with both the OBUFT and the OBUFE. Maybe the problem
really is in dealing with IOPADS, however. Anyway, the CUPL statements
clearly are not right. There is no pin defined for the IOPAD, and the equations
for the logic following the IOPAD (with an IBUF) are completely wrong,
and are actually repeated. By that I mean that there are several occurrences
of an eauation for the same signal, all different. I suspect the correct code
should look like :
IF (tri-state control) THEN OUTDATA = X ELSE OUTDATA = 'Z';
(excuse my lapse into VHDL here, which I know a little better than CUPL.)
But Protel creates :
OUTDATA = NetU3_O;
OUTDATA. oe = NetU4_O;
OUTDATA = NetU5_O;
OUTDATA;


Has anyone else seen this and, even more importantly, have any solutions to make
it work. I'm using this as a front-end to Xilinx tools. I've figured out how to get
an EDIF out of Protel, and hack it up to the point it can be accepted by Xilinx ISE,
which I thought was a pretty major accomplishment! But, Xilinx's simulator is
almost as cumbersome as their schematic tool.


Thanks much in advance!

Jon






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