I sometimes find the layer displays to be difficult to interpret (i.e. confusing or misleading). So I do a quick gerber generation and look with camtastic. Then I can see exactly what Protel is doing.


At 06:23 AM 12/5/2003, you wrote:
Abd ul-Rahman Lomax wrote:

At 05:34 PM 12/2/2003, you wrote:

Now, I have several throughhole pads that should connect to a
midlayer. They appear not to connect though. Beside the
4 90degree sectors, that form a heat resistance, also a
ring can bee seen, obviously isolating the hole.

The vias only have the sectors, not the ring.

Is there a setting I overlooked ?

First of all, a matter of terminology. "midlayer" might seem rationally to refer to any layer other than top or bottom, but in Protel it refers only to positive layers, and you are attempting to work with Inner Planes. Inner Planes are calculated, negative layers.
I'm not at all sure of what the "ring" you are seeing might be. First of all, if it "obviously" is isolating the hole, you must have hole display turned on. You might experiment with disabling and enabling display of different kinds of primitives and layers to see what exactly this ring is. If, for example, you have display of solder mask layers enabled, and under certain conditions, you might well see something that looks like a ring. Or it might be the pad itself. Or a spurious primitive, perhaps a pad, that is part of the footprint.
Or, more likely: you are just seeing a thermal relief, no "ring": it is plotted in the negative using four short arcs that leave four openings, but since it is negative, the *openings* are the copper. Then you see the hole, since you have hole display enabled. Between the hole and the arcs your screen is a certain color. That color is the background color, and with a negative layer, it represents copper. That copper connects through the four openings to the rest of the plane. The "ring" is copper, and it extends to the hole, as you'd expect.
Vias, generally, by the way, should not have thermal reliefs. You don't need a thermal relief with a via, since you aren't soldering a pin to it, and generally you want as low an impedance as possible when a via connects to a power plane. You should set a rule to direct-connect vias to the plane.

Thanks for the clarifications. I found the rings to be from the 'multilayer'. Hmmm. When selfetching, I tended to have the multilayer printed on top of bottomlayer and on top of toplayer. So obviously this is not the case the inner planes.


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