Hey Guys, I think this may have been discussed previously, but I couldn't find anything in the archives. When I run a manual DRC, I often get the line "Violations Detected: 8", or sometimes a warning count instead, even though no violations are listed. Does anybody know what the violation/warning count refers to? I've pasted an example DRC report below.
Thanks, Darcy Davis Design Engineer Dynastream Innovations, Inc. Protel Design System Design Rule Check PCB File : XXXXXX.pcb Date : 13-May-2004 Time : 08:53:43 Processing Rule : Component Clearance Constraint (Gap=-100mil) (Is in component D500 ),(Is in component D501 ) Rule Violations :0 Processing Rule : Clearance Constraint (Gap=0mil) (Is in component J202 ),(Is in component J202 ) Rule Violations :0 Processing Rule : Clearance Constraint (Gap=0mil) (Is in component J301 ),(Is in component J301 ) Rule Violations :0 Processing Rule : Short-Circuit Constraint (Allowed=Allowed) (Is on net AGND ),(Is on net GND ) Rule Violations :0 Processing Rule : Clearance Constraint (Gap=6mil) (Is a Via ),(Is a Smd Pad ) Rule Violations :0 Processing Rule : Hole Size Constraint (Min=0mil) (Max=200mil) (On the board ) Rule Violations :0 Processing Rule : Pads and Vias to follow the Drill pairs settings Rule Violations :0 Processing Rule : Width Constraint (Min=6mil) (Max=30mil) (Prefered=6mil) (On the board ) Rule Violations :0 Processing Rule : Broken-Net Constraint ( (On the board ) ) Rule Violations :0 Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board ) Rule Violations :0 Processing Rule : Clearance Constraint (Gap=10mil) (On the board ),(On layer BottomLayer And Is a Polygon ) Rule Violations :0 Processing Rule : Component Clearance Constraint (Gap=25mil) (On the board ),(On the board ) Rule Violations :0 Processing Rule : Component Clearance Constraint (Gap=0mil) (Is in component J301 ),(On the board ) Rule Violations :0 Processing Rule : Component Clearance Constraint (Gap=0mil) (Is in component J202 ),(On the board ) Rule Violations :0 Processing Rule : Clearance Constraint (Gap=460mil) (Is a Polygon ),(Is a Keep-Out ) Rule Violations :0 Processing Rule : Clearance Constraint (Gap=6mil) (On the board ),(On the board ) Rule Violations :0 Violations Detected : 8 Time Elapsed : 00:00:56 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
