> Not really; amsat often uses COTS chips that aren't stable under
> radiation, but which exhibit known (and reversable) failure modes.
> SA1100 chips with cache disabled and using SRAM for memory will crash,
> but avoid lockups and so a smaller house-keeping processor can reset the
> system as needed.

Wow, SA1100 for standard duration orbits. Cool.

Keith has a good point here. Which is if we do want to make this space
ready, we'll need to think about this now. For example, we should think
about the ability to power down chips that might lockup (specifically,
the FC).

Anybody interested in doing the research on this?



       Andrew Greenberg - [EMAIL PROTECTED] - 503.788.1343

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