Sorry for the delay on this, it's been busy here.
> Hi all,
> I'm researching candidates to replace the current power switch controllers
> on the APS and I've got a couple questions.
> First: Is there such a thing as too small? I'm looking at a 3mm x 3mm
> 10-pin SOIC package. I think the current chip is like a 6mm x 10mm 8 pin
> package. Does a smaller chip with more pins just complicate things?
Stay away from BGA packages if possible. DFN/QFN are acceptable,
particularly if there is an appreciable gain in thermal performance vs
a leaded package. Smaller is generally better than bigger, but if it
fits it's fine.
> Second: I'm currently basing my search on the ability of the IC to meet the
> given specs (i.e. adjustable current trip/trip delay, latch-off ,
> soft-on/soft-off, etc.) and am using the specs of the old chip as sort of a
> guide for all other specs. My understanding is that a wide range for
> Vsupply is also a must (9-20V is what I've been told). Are there any other
> features/specifications which need immediate consideration such as
> overvoltage/undervoltage lockout, quiescent current, etc?
> Basically, there are a lot of these chips out there, and the datasheets for
> these chips provide so much data, so I'm just wondering if there are a few
> benchmark specs that would tell me whether the part even deserves
I've consulted with Andrew, and the two of us agree that we can set a 5A
per switch limit. This means that worst-case any switch must be able to
sustain 5 amps continuous operating current. If it matters to you, total
sustained battery current drain can be taken as less than 20A.
I would like to hold the power dissipation in the power switch to
something reasonable. This might be around 1/4 W, so at 5 amps the
required switch resistance is under 10 milliOhms. This is borderline for
typical modern internal switch power controllers, so an external FET
controller will probably be required.
I have updated the "Power Switches" section in the requirements
Please feel free to fire off more questions.
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