This may be a goofy question, but I'm unclear on the matter so I'll ask it
anyway... I've noticed that many of the existing parts in the psas EAGLE
library have pins represented in both the top layer and tplace layer. I'm
guessing that the tplace layer pin represents the physical pin and the top
layer representation is the footprint. Is this correct, and should we be
doing this as we create new ICs in EAGLE? thus far I've only used the smd
function for pins, but it wouldn't be too hard to add rectangles using the
On the same note, I also notice that the dimensions of the pins in the top
layer seem different than those drawn with the tPlace layer. Is this
difference in dimension represented somehow in the datasheet?
Thanks for the help!
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