On Tue, Oct 25, 2011 at 9:37 AM, Nagasrinivas Pinjala <pinja...@yahoo.com>wrote:

> Dan's answer is bit cryptic and needs more explanation. I referred the
> manual but it only speaks about how setting the bits in GPIO registers sets
> or clears the corresponding pins.
>
> >>" The PIN register, after your pair of operations, will have bits 25 and
> 18 (and their corresponding output latches) set; The IOxSET registers, I'm
> fairly sure, are read as '0' "
>
> If after the second operation, the output latch corresponding to bit 25 is
> still set then do we have to set the corresponding bit in IO0CLR register ?
>

No, if you want to SET the output associated with bit 25 (make it logic
HIGH), you don't want to mess with the CLR (clear) register. The CLR (clear)
register is for *CLEARING* the pin (making it logic LOW).

Read table 132:


Table 132. GPIO register map (legacy APB accessible registers)
...
IOPIN GPIO Port Pin value register. The current state of the GPIO
configured port pins can always be read from this register,
regardless of pin direction. By writing to this register port’s pins will
be set to the desired level instantaneously.
R/W NA

IOSET GPIO Port Output Set register. This register controls the state of
output pins in conjunction with the IOCLR register. Writing ones
produces highs at the corresponding port pins. Writing zeroes has
no effect.
R/W 0x0

IODIR GPIO Port Direction control register. This register individually
controls the direction of each port pin.
R/W 0x0

IOCLR GPIO Port Output Clear register. This register controls the state of
output pins. Writing ones produces lows at the corresponding port
pins and clears the corresponding bits in the IOSET register.
Writing zeroes has no effect.
WO 0x0






> ------------------------------
> *From:* I <kirk...@pdx.edu>
> *To:* Andrew Greenberg <and...@psas.pdx.edu>; Nagasrinivas Pinjala <
> pinja...@yahoo.com>; psas-avionics <psas-avion...@psas.pdx.edu>
> *Sent:* Tuesday, October 25, 2011 10:36 AM
> *Subject:* Re: [psas-avionics] Question about I/O register
>
> I don't think that's correct. Bit 25 *will* be cleared, but the |= won't
> help. The 'SET' registers will only set the GPIO bits. I think they are
> always read back as '0', or at least they revert to '0' as soon as they have
> modified the output latch. Read the user manual for read values on GPIO SET
> and CLR registers.
>
> The PIN register, after your pair of operations, will have bits 25 and 18
> (and their corresponding output latches) set; The IOxSET registers, I'm
> fairly sure, are read as '0'. I would not expect a read modify write
> instruction such as |= to get the value of the first operation every time.
>
> Another way to do this in just one operation:
>
> IO0SET = ( (1 << 25) |  (1 << 18) );
>
> On Tue, Oct 25, 2011 at 8:17 AM, Andrew Greenberg <and...@psas.pdx.edu>wrote:
>
> > I have a question about the GPIO registers. Let's say I do the
> > following assignment:
> >
> > IO0SET = 1 << 25; IO0SET = 1 << 18;
> >
> > Will the bit in position 25 will be set or cleared ?
>
> Cleared. On the first line, you're writing in (1 << 25) which is
> 33554432 (in decimal). On the second line, you're writing the IO0SET
> register with the value 262144. Doesn't matter what was in it before,
> it's now whatever you set it to.
>
> If you *want* to have it still have the same bits, you'll have to use an
> OR operation:
>
> IO0SET |= (1 << 18);
>
> in which case, assuming that what you really meant for line 2, the value
> in the register is now 33816576.
>
> Andrew
>
> --
> -------------------------------------------------------
> Andrew Greenberg
>
> Portland State Aerospace Society (http://psas.pdx.edu/)
> and...@psas.pdx.edu  C: 503.708.7711
> -------------------------------------------------------
>
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