On 08/15/2011 12:27 PM, Bernhard Walle wrote:
> * Marc Kleine-Budde <[email protected]> [2011-08-15 12:25]:
>> On 08/15/2011 12:20 PM, Juergen Beisert wrote:
>>> Marc Kleine-Budde wrote:
>>>> On 08/14/2011 12:51 PM, Bernhard Walle wrote:
>>>>> The toolchain has been tested with a so-called Bifferboard
>>>>> (http://bifferos.co.uk/) which has a S3282 BGA CPU (R861x/R321x
>>>>> equivalent) that understands 486SX instructions.
>>>>
>>>> What about the FPU? Does the cpu support float instructions? Does the
>>>> toolchain genereate them?
>>>
>>> 486*SX* means no FPU. 486*DX* means with FPU.
>>
>> What does "cat /proc/cpuinfo" show?
>>
>> So the processor doesn't support fpu, does the toolchain generate FPU
>> instructions?
> 
> No, the CPU has no FPU. But the kernel is able to emulate the FPU,
> so it's just slow but it works.
> 
> I just didn't manage to create a i486 toolchain with soft-float.
> See also http://old.nabble.com/i486-toolchain-with-softfloat-td31879412.html.
> 
> The hint about multilib didn't help either. Do you have any ideas?

You have to build the compiler with no fpu support - and probably the
glibc, too.

Marc
-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
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