https://bugs.freedesktop.org/show_bug.cgi?id=47899
--- Comment #42 from Raymond <[email protected]> --- 3.6.1 DMA Position in Current Buffer The “DMA Position in Buffer” structure is written to a memory buffer each time a stream DMA position changes. 3.6.2 Buffer Descriptor List The Buffer Descriptor List (BDL) is a memory structure that describes the buffers in memory. The BDL is comprised of a series of Buffer Descriptor List Entries. There must be at least two entries in the list, with a maximum of 256 entries 3.6.3 Buffer Descriptor List Entry Each Buffer Descriptor List Entry (BDLE) contains a description of a buffer which is a piece of the whole cyclic stream buffer. The buffers described by the BDLE must start on a 128-byte boundary, and the length must be an integer number of Words. your two hda controllers will use same buffer size(buffer time 1 seconds) at stereo 48000Hz since One second * 48000Hz * 4 bytes align at 128 byte boundary but 44100Hz does not align at 128bytes -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.
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