Author: David Schneider <[email protected]>
Branch: arm-backed-float
Changeset: r44402:cb170aa2b833
Date: 2011-05-24 14:01 +0200
http://bitbucket.org/pypy/pypy/changeset/cb170aa2b833/
Log: translation fixes
diff --git a/pypy/jit/backend/arm/assembler.py
b/pypy/jit/backend/arm/assembler.py
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -194,9 +194,6 @@
elif group == self.REF_TYPE:
tgt = self.fail_boxes_ptr.get_addr_for_num(fail_index)
rffi.cast(rffi.LONGP, tgt)[0] = value
- #self.fail_boxes_ptr.setitem(fail_index, value)#
rffi.cast(llmemory.GCREF, value))
- elif group == self.FLOAT_TYPE:
- self.fail_boxes_float.setitem(fail_index, value)
else:
assert 0, 'unknown type'
@@ -802,7 +799,7 @@
self.mc.gen_load_int(temp.value, offset.value)
self.mc.ADD_rr(temp.value, r.fp.value, temp.value)
else:
- self.mc.ADD_rr(temp.value, r.fp.value, offset)
+ self.mc.ADD_rr(temp.value, r.fp.value, offset.value)
self.mc.VSTR(prev_loc.value, temp.value, cond=cond)
elif loc.is_vfp_reg() and prev_loc.is_stack():
# load spilled value into vfp reg
@@ -811,7 +808,7 @@
self.mc.gen_load_int(temp.value, offset.value)
self.mc.ADD_rr(temp.value, r.fp.value, temp.value)
else:
- self.mc.ADD_rr(temp.value, r.fp.value, offset)
+ self.mc.ADD_rr(temp.value, r.fp.value, offset.value)
self.mc.VLDR(loc.value, temp.value, cond=cond)
else:
assert 0, 'unsupported case'
diff --git a/pypy/jit/backend/arm/opassembler.py
b/pypy/jit/backend/arm/opassembler.py
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -18,6 +18,7 @@
from pypy.jit.backend.arm.codebuilder import ARMv7Builder, OverwritingBuilder
from pypy.jit.backend.arm.jump import remap_frame_layout
from pypy.jit.backend.arm.regalloc import Regalloc, TempInt, TempPtr
+from pypy.jit.backend.arm.locations import imm
from pypy.jit.backend.llsupport import symbolic
from pypy.jit.backend.llsupport.descr import BaseFieldDescr, BaseArrayDescr
from pypy.jit.backend.llsupport.regalloc import compute_vars_longevity
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