Author: David Schneider <david.schnei...@picle.org>
Branch: arm-backed-float
Changeset: r44648:836b3618c75e
Date: 2011-06-02 11:59 +0200
http://bitbucket.org/pypy/pypy/changeset/836b3618c75e/

Log:    correct offset calculations for loading and storing spilled floats
        to and from core registers

diff --git a/pypy/jit/backend/arm/assembler.py 
b/pypy/jit/backend/arm/assembler.py
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -856,7 +856,7 @@
             self.mc.LDR_ri(reg2.value, temp.value, imm=WORD, cond=cond)
         elif vfp_loc.is_stack():
             # load spilled value into vfp reg
-            offset = ConstInt((vfp_loc.position+1)*WORD)
+            offset = ConstInt((vfp_loc.position)*WORD)
             if not _check_imm_arg(offset, size=0xFFF):
                 self.mc.gen_load_int(temp.value, -offset.value, cond=cond)
                 self.mc.LDR_rr(reg1.value, r.fp.value, temp.value, cond=cond)
@@ -875,7 +875,7 @@
             self.mc.VMOV_cr(vfp_loc.value, reg1.value, reg2.value, cond=cond)
         elif vfp_loc.is_stack():
             # load spilled value into vfp reg
-            offset = ConstInt((vfp_loc.position+1)*WORD)
+            offset = ConstInt((vfp_loc.position)*WORD)
             if not _check_imm_arg(offset, size=0xFFF):
                 self.mc.gen_load_int(temp.value, -offset.value, cond=cond)
                 self.mc.STR_rr(reg1.value, r.fp.value, temp.value, cond=cond)
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