Author: David Schneider <david.schnei...@picle.org>
Branch: arm-backend-2
Changeset: r45608:6cf24885c6df
Date: 2011-07-14 13:00 +0200
http://bitbucket.org/pypy/pypy/changeset/6cf24885c6df/
Log: translation fixes
diff --git a/pypy/jit/backend/arm/assembler.py
b/pypy/jit/backend/arm/assembler.py
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -135,6 +135,7 @@
after = rffi.aroundstate.after
if after:
after()
+
_NOARG_FUNC = lltype.Ptr(lltype.FuncType([], lltype.Void))
def _build_release_gil(self, gcrootmap):
assert gcrootmap.is_shadow_stack
@@ -142,8 +143,8 @@
self._release_gil_shadowstack)
reacqgil_func = llhelper(self._NOARG_FUNC,
self._reacquire_gil_shadowstack)
- self.releasegil_addr = self.cpu.cast_ptr_to_int(releasegil_func)
- self.reacqgil_addr = self.cpu.cast_ptr_to_int(reacqgil_func)
+ self.releasegil_addr = rffi.cast(lltype.Signed, releasegil_func)
+ self.reacqgil_addr = rffi.cast(lltype.Signed, reacqgil_func)
def setup_failure_recovery(self):
diff --git a/pypy/jit/backend/arm/opassembler.py
b/pypy/jit/backend/arm/opassembler.py
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -480,7 +480,7 @@
else:
callargs = [r.r0, r.r1, r.r2]
remap_frame_layout(self, arglocs, callargs, r.ip)
- func = self.cpu.cast_adr_to_int(addr)
+ func = rffi.cast(lltype.Signed, addr)
#
# misaligned stack in the call, but it's ok because the write
barrier
# is not going to call anything more.
@@ -952,32 +952,31 @@
emit_guard_call_release_gil = emit_guard_call_may_force
- def call_release_gil(self, gcrootmap, save_registers):
+ def call_release_gil(self, gcrootmap, save_registers, fcond):
# First, we need to save away the registers listed in
# 'save_registers' that are not callee-save. XXX We assume that
# the floating point registers won't be modified.
- import pdb; pdb.set_trace()
regs_to_save = []
for reg in self._regalloc.rm.save_around_call_regs:
if reg in save_registers:
regs_to_save.append(reg)
assert gcrootmap.is_shadow_stack
with saved_registers(self.mc, regs_to_save):
- self._emit_call(-1, self.releasegil_addr, [], regalloc, fcond)
+ self._emit_call(-1, self.releasegil_addr, [], self._regalloc,
fcond)
- def call_reacquire_gil(self, gcrootmap, save_loc):
+ def call_reacquire_gil(self, gcrootmap, save_loc, fcond):
# save the previous result into the stack temporarily.
# XXX like with call_release_gil(), we assume that we don't need
# to save vfp regs in this case.
regs_to_save = []
- if isinstance(save_loc, RegLoc) and not save_loc.is_vfp_reg():
+ if save_loc.is_reg():
regs_to_save.append(save_loc)
# call the reopenstack() function (also reacquiring the GIL)
if len(regs_to_save) == 1:
regs_to_save.append(r.ip) # for alingment
assert gcrootmap.is_shadow_stack
with saved_registers(self.mc, regs_to_save):
- self._emit_call(-1, self.reacqgil_addr, [], regalloc, fcond)
+ self._emit_call(-1, self.reacqgil_addr, [], self._regalloc, fcond)
def write_new_force_index(self):
# for shadowstack only: get a new, unused force_index number and
diff --git a/pypy/jit/backend/arm/regalloc.py b/pypy/jit/backend/arm/regalloc.py
--- a/pypy/jit/backend/arm/regalloc.py
+++ b/pypy/jit/backend/arm/regalloc.py
@@ -1008,7 +1008,7 @@
loc, box = self._ensure_value_is_boxed(op.getarg(i), argboxes)
arglocs.append(loc)
argboxes.append(box)
- self.assembler.call_release_gil(gcrootmap, arglocs)
+ self.assembler.call_release_gil(gcrootmap, arglocs, fcond)
self.possibly_free_vars(argboxes)
# do the call
faildescr = guard_op.getdescr()
@@ -1017,7 +1017,7 @@
self.assembler.emit_op_call(op, args, self, fcond, fail_index)
# then reopen the stack
if gcrootmap:
- self.call_reacquire_gil(gcrootmap, r.r0)
+ self.assembler.call_reacquire_gil(gcrootmap, r.r0, fcond)
locs = self._prepare_guard(guard_op)
self.possibly_free_vars(guard_op.getfailargs())
return locs
diff --git a/pypy/jit/backend/arm/runner.py b/pypy/jit/backend/arm/runner.py
--- a/pypy/jit/backend/arm/runner.py
+++ b/pypy/jit/backend/arm/runner.py
@@ -100,10 +100,11 @@
LLInterpreter.current_interpreter = prev_interpreter
return res
- @staticmethod
def cast_ptr_to_int(x):
adr = llmemory.cast_ptr_to_adr(x)
return ArmCPU.cast_adr_to_int(adr)
+ cast_ptr_to_int._annspecialcase_ = 'specialize:arglltype(0)'
+ cast_ptr_to_int = staticmethod(cast_ptr_to_int)
def force(self, addr_of_force_index):
TP = rffi.CArrayPtr(lltype.Signed)
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