Author: edelsohn
Branch: ppc-jit-backend
Changeset: r46763:16d85cc9f9da
Date: 2011-08-24 19:33 -0400
http://bitbucket.org/pypy/pypy/changeset/16d85cc9f9da/

Log:    emit_getfield_gc typo if -> elif

diff --git a/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py 
b/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
--- a/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
+++ b/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
@@ -1212,7 +1212,7 @@
         field_addr_reg = cpu.reg_map[fptr]
         if width == 8:
             self.ld(free_reg, field_addr_reg, offset)
-        if width == 4:
+        elif width == 4:
             if IS_PPC_32 or not sign:
                 self.lwz(free_reg, field_addr_reg, offset)
             else:
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