Author: David Schneider <[email protected]>
Branch: arm-backend-2
Changeset: r51449:48cc79e4f981
Date: 2012-01-18 17:32 +0100
http://bitbucket.org/pypy/pypy/changeset/48cc79e4f981/
Log: (arigo, bivab) fix for guard_nonnull_class which was emitting two
guards. Additionally make sure that the offset is a small enough imm
value.
diff --git a/pypy/jit/backend/arm/opassembler.py
b/pypy/jit/backend/arm/opassembler.py
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -267,38 +267,28 @@
# from ../x86/assembler.py:1265
def emit_op_guard_class(self, op, arglocs, regalloc, fcond):
self._cmp_guard_class(op, arglocs, regalloc, fcond)
+ self._emit_guard(op, arglocs[3:], c.EQ, save_exc=False)
return fcond
def emit_op_guard_nonnull_class(self, op, arglocs, regalloc, fcond):
- offset = self.cpu.vtable_offset
+ self.mc.CMP_ri(arglocs[0].value, 1)
+ self._cmp_guard_class(op, arglocs, regalloc, c.HS)
+ self._emit_guard(op, arglocs[3:], c.EQ, save_exc=False)
+ return fcond
- self.mc.CMP_ri(arglocs[0].value, 0)
+ def _cmp_guard_class(self, op, locs, regalloc, fcond):
+ offset = locs[2]
if offset is not None:
- self._emit_guard(op, arglocs[3:], c.NE, save_exc=False)
+ self.mc.LDR_ri(r.ip.value, locs[0].value, offset.value, cond=fcond)
+ self.mc.CMP_rr(r.ip.value, locs[1].value, cond=fcond)
else:
raise NotImplementedError
- self._cmp_guard_class(op, arglocs, regalloc, fcond)
- return fcond
+ # XXX port from x86 backend once gc support is in place
def emit_op_guard_not_invalidated(self, op, locs, regalloc, fcond):
return self._emit_guard(op, locs, fcond, save_exc=False,
is_guard_not_invalidated=True)
- def _cmp_guard_class(self, op, locs, regalloc, fcond):
- offset = locs[2]
- if offset is not None:
- if offset.is_imm():
- self.mc.LDR_ri(r.ip.value, locs[0].value, offset.value)
- else:
- assert offset.is_reg()
- self.mc.LDR_rr(r.ip.value, locs[0].value, offset.value)
- self.mc.CMP_rr(r.ip.value, locs[1].value)
- else:
- raise NotImplementedError
- # XXX port from x86 backend once gc support is in place
-
- return self._emit_guard(op, locs[3:], c.EQ, save_exc=False)
-
class OpAssembler(object):
diff --git a/pypy/jit/backend/arm/regalloc.py b/pypy/jit/backend/arm/regalloc.py
--- a/pypy/jit/backend/arm/regalloc.py
+++ b/pypy/jit/backend/arm/regalloc.py
@@ -646,13 +646,14 @@
boxes = op.getarglist()
x = self._ensure_value_is_boxed(boxes[0], boxes)
- y = self.get_scratch_reg(REF, forbidden_vars=boxes)
+ y = self.get_scratch_reg(INT, forbidden_vars=boxes)
y_val = rffi.cast(lltype.Signed, op.getarg(1).getint())
self.assembler.load(y, imm(y_val))
offset = self.cpu.vtable_offset
assert offset is not None
- offset_loc = self._ensure_value_is_boxed(ConstInt(offset), boxes)
+ assert check_imm_arg(offset)
+ offset_loc = imm(offset)
arglocs = self._prepare_guard(op, [x, y, offset_loc])
return arglocs
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