Author: Armin Rigo <[email protected]>
Branch: stm-thread-2
Changeset: r57766:62c032fbc968
Date: 2012-10-03 16:00 +0200
http://bitbucket.org/pypy/pypy/changeset/62c032fbc968/
Log: hack hack
diff --git a/pypy/jit/backend/x86/assembler.py
b/pypy/jit/backend/x86/assembler.py
--- a/pypy/jit/backend/x86/assembler.py
+++ b/pypy/jit/backend/x86/assembler.py
@@ -2151,6 +2151,11 @@
self.mc = None
def generate_failure(self, fail_index, locs, boxes):
+ # XXX temporary
+ if len(boxes) == 1 and isinstance(boxes[0], Const):
+ self.mc.MOV_ri(eax.value, boxes[0].getint())
+ locs[0] = regloc.REGLOCS[0]
+ #
mc2 = codebuf.MachineCodeBlockWrapper()
self.write_failure_recovery_description(mc2, boxes, locs, fail_index)
bytecode = mc2.materialize(self.cpu.asmmemmgr, self.allblocks)
@@ -2165,6 +2170,7 @@
# Reserve space for all general purpose registers
mc.ADD_ri(esp.value, -self.cpu.NUM_REGS * WORD)
# Save the surviving registers in there
+ mc.MOV_sr(ebp.value * WORD, ebp.value)
for loc in locs:
if isinstance(loc, RegLoc):
assert not loc.is_xmm, "XXX returning an xmm reg: fixme"
_______________________________________________
pypy-commit mailing list
[email protected]
http://mail.python.org/mailman/listinfo/pypy-commit