Author: Maciej Fijalkowski <[email protected]>
Branch: jitframe-on-heap
Changeset: r60739:260450a5706c
Date: 2013-01-30 18:22 +0200
http://bitbucket.org/pypy/pypy/changeset/260450a5706c/

Log:    merge

diff --git a/rpython/jit/backend/arm/assembler.py 
b/rpython/jit/backend/arm/assembler.py
--- a/rpython/jit/backend/arm/assembler.py
+++ b/rpython/jit/backend/arm/assembler.py
@@ -8,9 +8,10 @@
                                     N_REGISTERS_SAVED_BY_MALLOC, \
                                     JITFRAME_FIXED_SIZE, FRAME_FIXED_SIZE
 from rpython.jit.backend.arm.codebuilder import ARMv7Builder, 
OverwritingBuilder
-from rpython.jit.backend.arm.locations import get_fp_offset, imm
+from rpython.jit.backend.arm.locations import get_fp_offset, imm, StackLocation
 from rpython.jit.backend.arm.regalloc import (Regalloc, ARMFrameManager,
                     CoreRegisterManager, check_imm_arg,
+                    VFPRegisterManager,
                     operations as regalloc_operations,
                     operations_with_guard as regalloc_operations_with_guard)
 from rpython.jit.backend.llsupport.asmmemmgr import MachineDataBlockWrapper
@@ -373,7 +374,7 @@
         # see ../x86/assembler.py:propagate_memoryerror_if_eax_is_null
         self.mc.CMP_ri(r.r0.value, 0)
         self.mc.B(self.propagate_exception_path, c=c.EQ)
-    
+
     def _push_all_regs_to_jitframe(self, mc, ignored_regs, withfloats,
                                 callee_only=False):
         if callee_only:
@@ -386,7 +387,15 @@
                 continue
             mc.STR_ri(gpr.value, r.fp.value, i * WORD)
         if withfloats:
-            assert 0, 'implement me'
+            if callee_only:
+                regs = VFPRegisterManager.save_around_call_regs
+            else:
+                regs = VFPRegisterManager.all_regs
+            for i, vfpr in enumerate(regs):
+                if vfpr in ignored_regs:
+                    continue
+                # add the offset of the gpr_regs
+                mc.VSTR(vfpr.value, r.fp.value, imm=i * DOUBLE_WORD)
 
     def _build_failure_recovery(self, exc, withfloats=False):
         mc = ARMv7Builder()
@@ -497,9 +506,8 @@
                     assert loc is not r.fp # for now
                     v = loc.value
                 else:
-                    assert 0, 'fix for floats'
                     assert loc.is_vfp_reg()
-                    #v = len(VFPRegisterManager.all_regs) + loc.value
+                    v = len(CoreRegisterManager.all_regs) + loc.value * 2
                 positions[i] = v * WORD
         # write down the positions of locs
         guardtok.faildescr.rd_locs = positions
@@ -680,31 +688,35 @@
 
     def assemble_bridge(self, faildescr, inputargs, operations,
                                                     original_loop_token, log):
-        assert 0
-        operations = self.setup(original_loop_token, operations)
-        descr_number = self.cpu.get_fail_descr_number(faildescr)
+        if not we_are_translated():
+            # Arguments should be unique
+            assert len(set(inputargs)) == len(inputargs)
+
+        self.setup(original_loop_token)
+        descr_number = compute_unique_id(faildescr)
         if log:
             operations = self._inject_debugging_code(faildescr, operations,
                                                      'b', descr_number)
+
         assert isinstance(faildescr, AbstractFailDescr)
-        code = self._find_failure_recovery_bytecode(faildescr)
-        frame_depth = faildescr._arm_current_frame_depth
-        arglocs = self.decode_inputargs(code)
-        if not we_are_translated():
-            assert len(inputargs) == len(arglocs)
 
-        regalloc = Regalloc(assembler=self, frame_manager=ARMFrameManager())
-        regalloc.prepare_bridge(inputargs, arglocs, operations)
+        arglocs = self.rebuild_faillocs_from_descr(faildescr, inputargs)
 
-        sp_patch_location = self._prepare_sp_patch_position()
+        regalloc = Regalloc(assembler=self)
+        operations = regalloc.prepare_bridge(inputargs, arglocs,
+                                             operations,
+                                             self.current_clt.allgcrefs,
+                                             self.current_clt.frame_info)
+
+        #sp_patch_location = self._prepare_sp_patch_position()
 
         startpos = self.mc.get_relative_pos()
 
-        frame_depth = self._assemble(operations, regalloc)
+        frame_depth = self._assemble(regalloc, inputargs, operations)
 
         codeendpos = self.mc.get_relative_pos()
 
-        self._patch_sp_offset(sp_patch_location, frame_depth)
+        #self._patch_sp_offset(sp_patch_location, frame_depth)
 
         self.write_pending_failure_recoveries()
 
@@ -713,6 +725,7 @@
         self.process_pending_guards(rawstart)
         self.fixup_target_tokens(rawstart)
 
+        # patch the jump from original guard
         self.patch_trace(faildescr, original_loop_token,
                                     rawstart, regalloc)
 
@@ -720,10 +733,9 @@
             # for the benefit of tests
             faildescr._arm_bridge_frame_depth = frame_depth
             if log:
-                self.mc._dump_trace(rawstart, 'bridge_%d.asm' %
-                self.cpu.total_compiled_bridges)
-        self.current_clt.frame_depth = max(self.current_clt.frame_depth,
-                                                                frame_depth)
+                self.mc._dump_trace(rawstart, 'bridge.asm')
+        frame_depth = max(self.current_clt.frame_info.jfi_frame_depth,
+                          frame_depth + JITFRAME_FIXED_SIZE)
         ops_offset = self.mc.ops_offset
         self.teardown()
 
@@ -734,15 +746,26 @@
 
         return AsmInfo(ops_offset, startpos + rawstart, codeendpos - startpos)
 
-    def _find_failure_recovery_bytecode(self, faildescr):
-        guard_stub_addr = faildescr._arm_failure_recovery_block
-        if guard_stub_addr == 0:
-            # This case should be prevented by the logic in compile.py:
-            # look for CNT_BUSY_FLAG, which disables tracing from a guard
-            # when another tracing from the same guard is already in progress.
-            raise BridgeAlreadyCompiled
-        # a guard requires 3 words to encode the jump to the exit code.
-        return guard_stub_addr + 3 * WORD
+    def rebuild_faillocs_from_descr(self, descr, inputargs):
+        locs = []
+        GPR_REGS = len(CoreRegisterManager.all_regs)
+        VFP_REGS = len(VFPRegisterManager.all_regs)
+        input_i = 0
+        for pos in descr.rd_locs:
+            if pos == -1:
+                continue
+            elif pos < GPR_REGS * WORD:
+                locs.append(CoreRegisterManager.all_regs[pos // WORD])
+            elif pos < (GPR_REGS * WORD + VFP_REGS * DOUBLE_WORD):
+                pos = pos // DOUBLE_WORD - GPR_REGS * WORD // DOUBLE_WORD
+                locs.append(VFPRegisterManager.all_regs[pos])
+            else:
+                i = pos // WORD - JITFRAME_FIXED_SIZE
+                assert i >= 0
+                tp = inputargs[input_i].type
+                locs.append(StackLocation(i, pos, tp))
+            input_i += 1
+        return locs
 
     def fixup_target_tokens(self, rawstart):
         for targettoken in self.target_tokens_currently_compiling:
diff --git a/rpython/jit/backend/arm/regalloc.py 
b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -303,9 +303,12 @@
         self.possibly_free_vars(list(inputargs))
         return operations
 
-    def prepare_bridge(self, inputargs, arglocs, ops):
-        self._prepare(inputargs, ops)
+    def prepare_bridge(self, inputargs, arglocs, operations, allgcrefs,
+                       frame_info):
+        operations = self._prepare(inputargs, operations, allgcrefs)
         self._update_bindings(arglocs, inputargs)
+        return operations
+
 
     def get_final_frame_depth(self):
         return self.frame_manager.get_frame_depth()
@@ -320,16 +323,19 @@
         used = {}
         i = 0
         for loc in locs:
+            if loc is None:
+                loc = r.fp
             arg = inputargs[i]
             i += 1
             if loc.is_reg():
                 self.rm.reg_bindings[arg] = loc
+                used[loc] = None
             elif loc.is_vfp_reg():
                 self.vfprm.reg_bindings[arg] = loc
+                used[loc] = None
             else:
                 assert loc.is_stack()
-                self.frame_manager.set_binding(arg, loc)
-            used[loc] = None
+                self.frame_manager.bind(arg, loc)
 
         # XXX combine with x86 code and move to llsupport
         self.rm.free_regs = []
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