Author: Maciej Fijalkowski <[email protected]>
Branch: jitframe-on-heap
Changeset: r60838:ce5c46a90939
Date: 2013-02-03 18:12 +0200
http://bitbucket.org/pypy/pypy/changeset/ce5c46a90939/
Log: Fix the comments and some basics for 32bit support
diff --git a/rpython/jit/backend/x86/arch.py b/rpython/jit/backend/x86/arch.py
--- a/rpython/jit/backend/x86/arch.py
+++ b/rpython/jit/backend/x86/arch.py
@@ -1,9 +1,6 @@
# Constants that depend on whether we are on 32-bit or 64-bit
-
-# The frame size gives the standard fixed part at the start of
-# every assembler frame: the saved value of some registers,
-# one word for the force_index, and some extra space used only
-# during a malloc that needs to go via its slow path.
+# the frame is absolutely standard. Stores callee-saved registers,
+# return address and some scratch space for arguments.
import sys
if sys.maxint == (2**31 - 1):
@@ -15,50 +12,31 @@
IS_X86_32 = False
IS_X86_64 = True
-# The stack for a JIT call is fixed, but it contains only scratch space
-# used e.g. for storing arguments to further calls:
#
# +--------------------+ <== aligned to 16 bytes
# | return address |
# +--------------------+
+# | saved regs |
+# +--------------------+
# | scratch |
# | space |
# +--------------------+ <== aligned to 16 bytes
-if WORD == 4:
- SCRATCH_SIZE = 7 # total size: 32 bytes
-else:
- SCRATCH_SIZE = 3 # total size: 32 bytes
-
# All the rest of the data is in a GC-managed variable-size "frame".
# This frame object's address is always stored in the register EBP/RBP.
# A frame is a jit.backend.llsupport.llmodel.JITFRAME = GcArray(Signed).
-# The following locations are indices in this array.
# The frame's fixed size gives the standard fixed part at the
-# start of every frame: the saved value of some registers,
-# one word for the force_index, and some extra space used only
-# during a malloc that needs to go via its slow path.
+# start of every frame: the saved value of some registers
if WORD == 4:
- # XXX rethink the fixed size
- # ebp + ebx + esi + edi + 4 extra words + force_index = 9 words
- XX
- FRAME_FIXED_SIZE = 6
- SAVED_REGISTERS = 1 # range(1, 5)
- MY_COPY_OF_REGS = 5 # range(5, 9)
- XXX
+ # ebp + ebx + esi + edi + 6 extra words + return address = 9 words
+ FRAME_FIXED_SIZE = 11
+ PASS_ON_MY_FRAME = 6
JITFRAME_FIXED_SIZE = 28 # 13 GPR + 15 XMM
else:
# rbp + rbx + r12 + r13 + r14 + r15 + 12 extra words + return address = 19
FRAME_FIXED_SIZE = 19
PASS_ON_MY_FRAME = 12
- JITFRAME_FIXED_SIZE = 28 # 13 GPR + 15 XMM
-
-# "My copy of regs" has room for almost all registers, apart from eax and edx
-# which are used in the malloc itself. They are:
-# ecx, ebx, esi, edi [32 and 64 bits]
-# r8, r9, r10, r12, r13, r14, r15 [64 bits only]
-#
-# Note that with asmgcc, the locations corresponding to callee-save registers
-# are never used.
+ JITFRAME_FIXED_SIZE = 6 + 8 # 6 GPR + 8 XMM
+
diff --git a/rpython/jit/backend/x86/regalloc.py
b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -17,7 +17,6 @@
from rpython.jit.codewriter import longlong
from rpython.jit.codewriter.effectinfo import EffectInfo
from rpython.jit.metainterp.resoperation import rop
-from rpython.jit.backend.llsupport.jitframe import NULLGCMAP, GCMAP
from rpython.jit.backend.llsupport.descr import ArrayDescr
from rpython.jit.backend.llsupport.descr import CallDescr
from rpython.jit.backend.llsupport.descr import unpack_arraydescr
@@ -29,8 +28,7 @@
from rpython.jit.backend.x86.arch import IS_X86_32, IS_X86_64
from rpython.jit.backend.x86 import rx86
from rpython.rlib.rarithmetic import r_longlong, r_uint
-from rpython.rlib.debug import (debug_print, debug_start, debug_stop,
- have_debug_prints)
+from rpython.rlib.debug import debug_print, debug_start, debug_stop
class X86RegisterManager(RegisterManager):
@@ -129,9 +127,6 @@
for _i, _reg in enumerate(gpr_reg_mgr_cls.all_regs):
gpr_reg_mgr_cls.all_reg_indexes[_reg.value] = _i
-if __name__ == '__main__':
- print gpr_reg_mgr_cls.all_reg_indexes
-
class RegAlloc(object):
def __init__(self, assembler, translate_support_code=False):
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