Author: Maciej Fijalkowski <[email protected]>
Branch: jitframe-on-heap
Changeset: r61825:60be45ca5fc5
Date: 2013-02-26 13:22 +0200
http://bitbucket.org/pypy/pypy/changeset/60be45ca5fc5/
Log: port e02ce6381c9e to ARM, but it still does not work
diff --git a/rpython/jit/backend/arm/regalloc.py
b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -341,13 +341,13 @@
for box, loc in self.rm.reg_bindings.iteritems():
if loc in forbidden_regs:
continue
- if box.type == REF:
+ if box.type == REF and self.fm.stays_alive(box):
assert not noregs
assert isinstance(loc, RegLoc)
val = gpr_reg_mgr_cls.all_reg_indexes[loc.value]
gcmap[val // WORD // 8] |= r_uint(1) << (val % (WORD * 8))
for box, loc in self.fm.bindings.iteritems():
- if box.type == REF:
+ if box.type == REF and self.fm.stays_alive(box):
assert isinstance(loc, StackLoc)
val = loc.value // WORD
gcmap[val // WORD // 8] |= r_uint(1) << (val % (WORD * 8))
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