Author: David Schneider <[email protected]>
Branch: jitframe-on-heap
Changeset: r62312:6ee2777242cd
Date: 2013-03-12 11:09 +0100
http://bitbucket.org/pypy/pypy/changeset/6ee2777242cd/
Log: call_malloc_nursery_varsize_small
diff --git a/rpython/jit/backend/arm/assembler.py
b/rpython/jit/backend/arm/assembler.py
--- a/rpython/jit/backend/arm/assembler.py
+++ b/rpython/jit/backend/arm/assembler.py
@@ -1247,17 +1247,21 @@
else:
raise AssertionError('Trying to pop to an invalid location')
- def malloc_cond(self, nursery_free_adr, nursery_top_adr, size, gcmap):
- assert size & (WORD-1) == 0 # must be correctly aligned
+ def malloc_cond(self, nursery_free_adr, nursery_top_adr, sizeloc, gcmap):
+ if sizeloc.is_imm(): # must be correctly aligned
+ assert sizeloc.value & (WORD-1) == 0
self.mc.gen_load_int(r.r0.value, nursery_free_adr)
self.mc.LDR_ri(r.r0.value, r.r0.value)
- if check_imm_arg(size):
- self.mc.ADD_ri(r.r1.value, r.r0.value, size)
+ if sizeloc.is_imm():
+ if check_imm_arg(sizeloc.value):
+ self.mc.ADD_ri(r.r1.value, r.r0.value, sizeloc.value)
+ else:
+ self.mc.gen_load_int(r.r1.value, sizeloc.value)
+ self.mc.ADD_rr(r.r1.value, r.r0.value, r.r1.value)
else:
- self.mc.gen_load_int(r.r1.value, size)
- self.mc.ADD_rr(r.r1.value, r.r0.value, r.r1.value)
+ self.mc.ADD_rr(r.r1.value, r.r0.value, sizeloc.value)
self.mc.gen_load_int(r.ip.value, nursery_top_adr)
self.mc.LDR_ri(r.ip.value, r.ip.value)
diff --git a/rpython/jit/backend/arm/opassembler.py
b/rpython/jit/backend/arm/opassembler.py
--- a/rpython/jit/backend/arm/opassembler.py
+++ b/rpython/jit/backend/arm/opassembler.py
@@ -1312,17 +1312,19 @@
def emit_op_call_malloc_nursery(self, op, arglocs, regalloc, fcond):
# registers r0 and r1 are allocated for this call
assert len(arglocs) == 1
- size = arglocs[0].value
+ sizeloc = arglocs[0]
gc_ll_descr = self.cpu.gc_ll_descr
gcmap = regalloc.get_gcmap([r.r0, r.r1])
self.malloc_cond(
gc_ll_descr.get_nursery_free_addr(),
gc_ll_descr.get_nursery_top_addr(),
- size,
+ sizeloc,
gcmap
)
self._alignment_check()
return fcond
+ emit_op_call_malloc_nursery_varsize_small = emit_op_call_malloc_nursery
+
def _alignment_check(self):
if not self.debug:
diff --git a/rpython/jit/backend/arm/regalloc.py
b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -1004,7 +1004,6 @@
self.rm.force_allocate_reg(op.result, selected_reg=r.r0)
t = TempInt()
self.rm.force_allocate_reg(t, selected_reg=r.r1)
- self.possibly_free_var(op.result)
self.possibly_free_var(t)
return [imm(size)]
@@ -1016,9 +1015,10 @@
self.rm.force_allocate_reg(op.result, selected_reg=r.r0)
t = TempInt()
self.rm.force_allocate_reg(t, selected_reg=r.r1)
- self.possibly_free_var(op.result)
+ argloc = self.make_sure_var_in_reg(size_box,
+ forbidden_vars=[op.result, t])
self.possibly_free_var(t)
- return [imm(size)]
+ return [argloc]
prepare_op_debug_merge_point = void
prepare_op_jit_debug = void
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