Author: Maciej Fijalkowski <[email protected]>
Branch: fast-newarray
Changeset: r63402:ca1767184735
Date: 2013-04-16 12:12 +0200
http://bitbucket.org/pypy/pypy/changeset/ca1767184735/

Log:    use flags and disable those on ARM

diff --git a/rpython/jit/backend/llsupport/llmodel.py 
b/rpython/jit/backend/llsupport/llmodel.py
--- a/rpython/jit/backend/llsupport/llmodel.py
+++ b/rpython/jit/backend/llsupport/llmodel.py
@@ -21,6 +21,8 @@
 class AbstractLLCPU(AbstractCPU):
     from rpython.jit.metainterp.typesystem import llhelper as ts
 
+    can_inline_varsize_malloc = False
+
     def __init__(self, rtyper, stats, opts, translate_support_code=False,
                  gcdescr=None):
         assert type(opts) is not bool
@@ -171,9 +173,9 @@
         def pos_exc_value():
             addr = llop.get_exc_value_addr(llmemory.Address)
             return heaptracker.adr2int(addr)
-        
+
         from rpython.rlib import rstack
-        
+
         STACK_CHECK_SLOWPATH = lltype.Ptr(lltype.FuncType([lltype.Signed],
                                                           lltype.Void))
         def insert_stack_check():
diff --git a/rpython/jit/backend/llsupport/rewrite.py 
b/rpython/jit/backend/llsupport/rewrite.py
--- a/rpython/jit/backend/llsupport/rewrite.py
+++ b/rpython/jit/backend/llsupport/rewrite.py
@@ -305,6 +305,8 @@
                                    arraydescr, kind=FLAG_ARRAY):
         """ itemsize is an int, v_length and v_result are boxes
         """
+        if not self.cpu.can_inline_varsize_malloc:
+            return False # temporary, kill when ARM supports it
         gc_descr = self.gc_ll_descr
         if (kind == FLAG_ARRAY and
             (arraydescr.basesize != gc_descr.standard_array_basesize or
diff --git a/rpython/jit/backend/x86/assembler.py 
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -1,7 +1,7 @@
 import sys
 import os
 
-from rpython.jit.backend.llsupport import symbolic, jitframe, gc
+from rpython.jit.backend.llsupport import symbolic, jitframe, rewrite
 from rpython.jit.backend.llsupport.assembler import (GuardToken, BaseAssembler,
                                                 DEBUG_COUNTER, debug_bridge)
 from rpython.jit.backend.llsupport.asmmemmgr import MachineDataBlockWrapper
@@ -2396,16 +2396,16 @@
         offset = self.mc.get_relative_pos() - jmp_adr0
         assert 0 < offset <= 127
         self.mc.overwrite(jmp_adr0-1, chr(offset))
-        if kind == 0:
+        if kind == rewrite.FLAG_ARRAY:
             self.mc.MOV_si(WORD, itemsize)
             self.mc.MOV(RawEspLoc(WORD * 2, INT), lengthloc)
             self.mc.MOV_si(WORD * 3, arraydescr.tid)
             addr = self.malloc_slowpath_varsize
         else:
-            if kind == 1:
+            if kind == rewrite.FLAG_STR:
                 addr = self.malloc_slowpath_str
             else:
-                assert kind == 2
+                assert kind == rewrite.FLAG_UNICODE
                 addr = self.malloc_slowpath_unicode
             self.mc.MOV(RawEspLoc(WORD, INT), lengthloc)
         # save the gcmap
diff --git a/rpython/jit/backend/x86/runner.py 
b/rpython/jit/backend/x86/runner.py
--- a/rpython/jit/backend/x86/runner.py
+++ b/rpython/jit/backend/x86/runner.py
@@ -23,6 +23,8 @@
     with_threads = False
     frame_reg = regloc.ebp
 
+    can_inline_varsize_malloc = True
+
     from rpython.jit.backend.x86.arch import JITFRAME_FIXED_SIZE
     all_reg_indexes = gpr_reg_mgr_cls.all_reg_indexes
     gen_regs = gpr_reg_mgr_cls.all_regs
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