Author: Armin Rigo <[email protected]>
Branch:
Changeset: r63496:3e87dbfef460
Date: 2013-04-19 00:34 +0200
http://bitbucket.org/pypy/pypy/changeset/3e87dbfef460/
Log: Bah, fix it properly for 64-bit too. Actually done by killing an
obscure hack and just writing the official 3 lines of description
for MOV16 and CMP16.
diff --git a/rpython/jit/backend/x86/regloc.py
b/rpython/jit/backend/x86/regloc.py
--- a/rpython/jit/backend/x86/regloc.py
+++ b/rpython/jit/backend/x86/regloc.py
@@ -521,17 +521,6 @@
return func_with_new_name(INSN, "INSN_" + name)
- def _16_bit_binaryop(name):
- def INSN(self, loc1, loc2):
- # Select 16-bit operand mode
- self.writechar('\x66')
- # XXX: Hack to let immediate() in rx86 know to do a 16-bit encoding
- self._use_16_bit_immediate = True
- getattr(self, name)(loc1, loc2)
- self._use_16_bit_immediate = False
-
- return INSN
-
def _addr_as_reg_offset(self, addr):
# Encodes a (64-bit) address as an offset from the scratch register.
# If we are within a "reuse_scratch_register" block, we remember the
@@ -616,10 +605,10 @@
NEG = _unaryop('NEG')
CMP = _binaryop('CMP')
- CMP16 = _16_bit_binaryop('CMP')
+ CMP16 = _binaryop('CMP16')
MOV = _binaryop('MOV')
MOV8 = _binaryop('MOV8')
- MOV16 = _16_bit_binaryop('MOV')
+ MOV16 = _binaryop('MOV16')
MOVZX8 = _binaryop('MOVZX8')
MOVSX8 = _binaryop('MOVSX8')
MOVZX16 = _binaryop('MOVZX16')
diff --git a/rpython/jit/backend/x86/rx86.py b/rpython/jit/backend/x86/rx86.py
--- a/rpython/jit/backend/x86/rx86.py
+++ b/rpython/jit/backend/x86/rx86.py
@@ -125,12 +125,7 @@
elif width == 'q' and mc.WORD == 8:
mc.writeimm64(immediate)
else:
- if mc._use_16_bit_immediate:
- # special case for the default width='i' for immediate(),
- # to support 16-bit if the flag is set by regloc.py
- mc.writeimm16(immediate)
- else:
- mc.writeimm32(immediate)
+ mc.writeimm32(immediate)
return 0
def immediate(argnum, width='i'):
@@ -311,9 +306,6 @@
def encode_rex(mc, rexbyte, basevalue, orbyte):
if mc.WORD == 8:
assert 0 <= rexbyte < 8
- # XXX: Hack. Ignore REX.W if we are using 16-bit operands
- if mc._use_16_bit_immediate:
- basevalue &= ~REX_W
if basevalue != 0 or rexbyte != 0:
if basevalue == 0:
basevalue = 0x40
@@ -454,9 +446,6 @@
class AbstractX86CodeBuilder(object):
"""Abstract base class."""
- # Used by the 16-bit version of instructions
- _use_16_bit_immediate = False
-
def writechar(self, char):
raise NotImplementedError
@@ -500,7 +489,7 @@
CMP_jr = insn(rex_w, '\x39', register(2, 8), abs_(1))
CMP32_mi = insn(rex_nw, '\x81', orbyte(7<<3), mem_reg_plus_const(1),
immediate(2))
-
+ CMP16_mi = insn('\x66', rex_nw, '\x81', orbyte(7<<3),
mem_reg_plus_const(1), immediate(2, 'h'))
CMP8_ri = insn(rex_fw, '\x80', byte_register(1), '\xF8', immediate(2, 'b'))
AND8_rr = insn(rex_fw, '\x20', byte_register(1), byte_register(2,8),
'\xC0')
@@ -732,6 +721,8 @@
define_modrm_modes('MOV8_*r', [rex_fw, '\x88', byte_register(2, 8)],
regtype='BYTE')
define_modrm_modes('MOV8_*i', [rex_fw, '\xC6', orbyte(0<<3)], [immediate(2,
'b')], regtype='BYTE')
+define_modrm_modes('MOV16_*r', ['\x66', rex_nw, '\x89', register(2, 8)])
+define_modrm_modes('MOV16_*i', ['\x66', rex_nw, '\xC7', orbyte(0<<3)],
[immediate(2, 'h')])
define_modrm_modes('MOVZX8_r*', [rex_w, '\x0F\xB6', register(1, 8)],
regtype='BYTE')
define_modrm_modes('MOVSX8_r*', [rex_w, '\x0F\xBE', register(1, 8)],
regtype='BYTE')
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