Author: Maciej Fijalkowski <[email protected]>
Branch:
Changeset: r63504:85c38bff6115
Date: 2013-04-19 17:02 +0200
http://bitbucket.org/pypy/pypy/changeset/85c38bff6115/
Log: don't store attributes on a PBC
diff --git a/rpython/jit/backend/arm/assembler.py
b/rpython/jit/backend/arm/assembler.py
--- a/rpython/jit/backend/arm/assembler.py
+++ b/rpython/jit/backend/arm/assembler.py
@@ -56,7 +56,7 @@
if we_are_translated():
self.debug = False
self.current_clt = looptoken.compiled_loop_token
- self.mc = InstrBuilder(self.cpu.arch_version)
+ self.mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
self.pending_guards = []
assert self.datablockwrapper is None
allblocks = self.get_asmmemmgr_blocks(looptoken)
@@ -80,7 +80,7 @@
if not self.cpu.propagate_exception_descr:
return # not supported (for tests, or non-translated)
#
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
self._store_and_reset_exception(mc, r.r0)
ofs = self.cpu.get_ofs_of_frame_field('jf_guard_exc')
# make sure ofs fits into a register
@@ -165,7 +165,7 @@
# | my own retaddr | <-- sp
# +-----------------------+
#
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
# save argument registers and return address
mc.PUSH([reg.value for reg in r.argument_regs] + [r.ip.value,
r.lr.value])
# stack is aligned here
@@ -206,7 +206,7 @@
# write barriers. It must save all registers, and optionally
# all vfp registers. It takes a single argument which is in r0.
# It must keep stack alignment accordingly.
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
#
exc0 = exc1 = None
mc.PUSH([r.ip.value, r.lr.value]) # push two words to keep alignment
@@ -252,7 +252,7 @@
def _build_malloc_slowpath(self, kind):
if kind != 'fixed':
return 0
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
self._push_all_regs_to_jitframe(mc, [r.r0, r.r1],
self.cpu.supports_floats)
ofs = self.cpu.get_ofs_of_frame_field('jf_gcmap')
# store the gc pattern
@@ -364,7 +364,7 @@
self.load_reg(mc, vfpr, r.fp, ofs)
def _build_failure_recovery(self, exc, withfloats=False):
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
self._push_all_regs_to_jitframe(mc, [], withfloats)
if exc:
@@ -647,7 +647,7 @@
expected_size=expected_size)
def _patch_frame_depth(self, adr, allocated_depth):
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
mc.gen_load_int(r.lr.value, allocated_depth)
mc.copy_to_raw_memory(adr)
@@ -723,7 +723,7 @@
# f) store the address of the new jitframe in the shadowstack
# c) set the gcmap field to 0 in the new jitframe
# g) restore registers and return
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
self._push_all_regs_to_jitframe(mc, [], self.cpu.supports_floats)
# this is the gcmap stored by push_gcmap(mov=True) in
_check_stack_frame
# and the expected_size pushed in _check_stack_frame
@@ -783,7 +783,7 @@
self.target_tokens_currently_compiling = None
def _patch_stackadjust(self, adr, allocated_depth):
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
mc.gen_load_int(r.lr.value, allocated_depth)
mc.copy_to_raw_memory(adr)
@@ -823,7 +823,7 @@
# patch the guard jumpt to the stub
# overwrite the generate NOP with a B_offs to the pos of the
# stub
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
mc.B_offs(relative_offset, c.get_opposite_of(tok.fcond))
mc.copy_to_raw_memory(guard_pos)
else:
@@ -902,7 +902,7 @@
self.mc.ASR_ri(resloc.value, resloc.value, 16)
def patch_trace(self, faildescr, looptoken, bridge_addr, regalloc):
- b = InstrBuilder(self.cpu.arch_version)
+ b = InstrBuilder(self.cpu.cpuinfo.arch_version)
patch_addr = faildescr._arm_failure_recovery_block
assert patch_addr != 0
b.B(bridge_addr)
diff --git a/rpython/jit/backend/arm/opassembler.py
b/rpython/jit/backend/arm/opassembler.py
--- a/rpython/jit/backend/arm/opassembler.py
+++ b/rpython/jit/backend/arm/opassembler.py
@@ -354,7 +354,7 @@
# whether to worry about a CALL that can collect; this
# is always true except in call_release_gil
can_collect=True):
- if self.cpu.hf_abi:
+ if self.cpu.cpuinfo.hf_abi:
stack_args, adr = self._setup_call_hf(adr, arglocs, fcond,
resloc, result_info)
else:
@@ -382,7 +382,7 @@
# ensure the result is wellformed and stored in the correct location
if resloc is not None:
- if resloc.is_vfp_reg() and not self.cpu.hf_abi:
+ if resloc.is_vfp_reg() and not self.cpu.cpuinfo.hf_abi:
# move result to the allocated register
self.mov_to_vfp_loc(r.r0, r.r1, resloc)
elif resloc.is_reg() and result_info != (-1, -1):
@@ -1230,7 +1230,7 @@
baseofs = self.cpu.get_baseofs_of_frame_field()
newlooptoken.compiled_loop_token.update_frame_info(
oldlooptoken.compiled_loop_token, baseofs)
- mc = InstrBuilder(self.cpu.arch_version)
+ mc = InstrBuilder(self.cpu.cpuinfo.arch_version)
mc.B(target)
mc.copy_to_raw_memory(oldadr)
diff --git a/rpython/jit/backend/arm/runner.py
b/rpython/jit/backend/arm/runner.py
--- a/rpython/jit/backend/arm/runner.py
+++ b/rpython/jit/backend/arm/runner.py
@@ -11,6 +11,10 @@
jitframe.STATICSIZE = JITFRAME_FIXED_SIZE
+class CPUInfo(object):
+ hf_abi = False
+ arch_version = 6
+
class AbstractARMCPU(AbstractLLCPU):
IS_64_BIT = False
@@ -26,13 +30,11 @@
float_regs = VFPRegisterManager.all_regs
frame_reg = fp
- hf_abi = False # use hard float abi flag
- arch_version = 6 # assume ARMv6 as base case
-
def __init__(self, rtyper, stats, opts=None, translate_support_code=False,
gcdescr=None):
AbstractLLCPU.__init__(self, rtyper, stats, opts,
translate_support_code, gcdescr)
+ self.cpuinfo = CPUInfo()
def set_debug(self, flag):
return self.assembler.set_debug(flag)
@@ -47,8 +49,8 @@
self.assembler = AssemblerARM(self, self.translate_support_code)
def setup_once(self):
- self.arch_version = detect_arch_version()
- self.hf_abi = detect_hardfloat()
+ self.cpuinfo.arch_version = detect_arch_version()
+ self.cpuinfo.hf_abi = detect_hardfloat()
self.assembler.setup_once()
def finish_once(self):
@@ -92,7 +94,7 @@
from rpython.jit.backend.arm.codebuilder import InstrBuilder
for jmp, tgt in looptoken.compiled_loop_token.invalidate_positions:
- mc = InstrBuilder(self.arch_version)
+ mc = InstrBuilder(self.cpuinfo.arch_version)
mc.B_offs(tgt)
mc.copy_to_raw_memory(jmp)
# positions invalidated
diff --git a/rpython/jit/backend/arm/test/test_runner.py
b/rpython/jit/backend/arm/test/test_runner.py
--- a/rpython/jit/backend/arm/test/test_runner.py
+++ b/rpython/jit/backend/arm/test/test_runner.py
@@ -27,7 +27,7 @@
bridge_loop_instructions = ['ldr', 'mov', 'nop', 'cmp', 'bge',
'push', 'mov', 'mov', 'push', 'mov', 'mov',
'blx', 'mov', 'mov', 'bx']
- if CPU.arch_version == 7:
+ if CPU.cpuinfo.arch_version == 7:
bridge_loop_instructions = ['ldr', 'mov', 'nop', 'cmp', 'bge',
'push', 'mov', 'mov', 'push', 'mov', 'mov',
'blx', 'mov', 'mov', 'bx']
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