Author: Maciej Fijalkowski <[email protected]>
Branch: fast-slowpath
Changeset: r65606:04fbc9dabd84
Date: 2013-07-24 16:08 +0200
http://bitbucket.org/pypy/pypy/changeset/04fbc9dabd84/
Log: fix
diff --git a/rpython/jit/backend/x86/assembler.py
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -155,7 +155,7 @@
"""
mc = codebuf.MachineCodeBlockWrapper()
self._push_all_regs_to_frame(mc, [], supports_floats, callee_only)
- if self.cpu.IS_X86_64:
+ if IS_X86_64:
mc.SUB(esp, imm(WORD))
else:
# we want space for 3 arguments + call + alignment
@@ -164,7 +164,7 @@
self.set_extra_stack_depth(mc, 2 * WORD)
# args are in their respective positions
mc.CALL(eax)
- if self.cpu.IS_X86_64:
+ if IS_X86_64:
mc.ADD(esp, imm(WORD))
else:
mc.ADD(esp, imm(WORD * 7))
@@ -2168,7 +2168,7 @@
if self._regalloc.xrm.reg_bindings:
floats = True
cond_call_adr = self.cond_call_slowpath[floats * 2 + callee_only]
- if self.cpu.IS_X86_32:
+ if IS_X86_32:
p = -7 * WORD
for i in range(len(arglocs) - 1, -1, -1):
loc = arglocs[i]
diff --git a/rpython/jit/backend/x86/regalloc.py
b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -811,7 +811,7 @@
args_so_far = [tmpbox]
locs = []
for i in range(2, len(args)):
- if self.cpu.IS_X86_64:
+ if IS_X86_64:
reg = self.rm.register_arguments[i - 2]
self.make_sure_var_in_reg(args[i], args_so_far,
selected_reg=reg)
else:
_______________________________________________
pypy-commit mailing list
[email protected]
http://mail.python.org/mailman/listinfo/pypy-commit