Author: Maciej Fijalkowski <[email protected]>
Branch: jitframe-offset
Changeset: r66396:0868aba1db4d
Date: 2013-08-28 14:59 +0100
http://bitbucket.org/pypy/pypy/changeset/0868aba1db4d/
Log: (fijal, antocuni, rguillebert) Small refactoring in the x86 backend
to have one way to read the position in jitframe
diff --git a/rpython/jit/backend/arm/locations.py
b/rpython/jit/backend/arm/locations.py
--- a/rpython/jit/backend/arm/locations.py
+++ b/rpython/jit/backend/arm/locations.py
@@ -33,6 +33,9 @@
def get_position(self):
raise NotImplementedError # only for stack
+ def get_jitframe_position(self):
+ raise NotImplementedError
+
class RegisterLocation(AssemblerLocation):
_immutable_ = True
width = WORD
diff --git a/rpython/jit/backend/arm/opassembler.py
b/rpython/jit/backend/arm/opassembler.py
--- a/rpython/jit/backend/arm/opassembler.py
+++ b/rpython/jit/backend/arm/opassembler.py
@@ -46,6 +46,26 @@
self.fcond = fcond
self.offset = offset
+ def compute_gcmap(self, gcmap, failargs, fail_locs, frame_depth):
+ # note that this is an old version that should not be here in
+ # the first place. Implement get_jitframe_position on ARM locations
+ # in order to make it work, then kill this function
+ input_i = 0
+ for i in range(len(failargs)):
+ arg = failargs[i]
+ if arg is None:
+ continue
+ loc = fail_locs[input_i]
+ input_i += 1
+ if arg.type == REF:
+ loc = fail_locs[i]
+ if loc.is_core_reg():
+ val = self.cpu.all_reg_indexes[loc.value]
+ else:
+ val = loc.get_position() + self.cpu.JITFRAME_FIXED_SIZE
+ gcmap[val // WORD // 8] |= r_uint(1) << (val % (WORD * 8))
+ return gcmap
+
class ResOpAssembler(BaseAssembler):
diff --git a/rpython/jit/backend/llsupport/assembler.py
b/rpython/jit/backend/llsupport/assembler.py
--- a/rpython/jit/backend/llsupport/assembler.py
+++ b/rpython/jit/backend/llsupport/assembler.py
@@ -36,22 +36,12 @@
self.is_guard_not_forced = is_guard_not_forced
def compute_gcmap(self, gcmap, failargs, fail_locs, frame_depth):
- # note that regalloc has a very similar compute, but
- # one that does iteration over all bindings, so slightly different,
- # eh
- input_i = 0
for i in range(len(failargs)):
arg = failargs[i]
if arg is None:
continue
- loc = fail_locs[input_i]
- input_i += 1
if arg.type == REF:
- loc = fail_locs[i]
- if loc.is_core_reg():
- val = self.cpu.all_reg_indexes[loc.value]
- else:
- val = loc.get_position() + self.cpu.JITFRAME_FIXED_SIZE
+ val = fail_locs[i].get_jitframe_position()
gcmap[val // WORD // 8] |= r_uint(1) << (val % (WORD * 8))
return gcmap
diff --git a/rpython/jit/backend/x86/assembler.py
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -1772,17 +1772,13 @@
regs = gpr_reg_mgr_cls.all_regs
for gpr in regs:
if gpr not in ignored_regs:
- v = gpr_reg_mgr_cls.all_reg_indexes[gpr.value]
+ v = gpr.get_jitframe_position()
mc.MOV_br(v * WORD + base_ofs, gpr.value)
if withfloats:
- if IS_X86_64:
- coeff = 1
- else:
- coeff = 2
# Push all XMM regs
- ofs = len(gpr_reg_mgr_cls.all_regs)
- for i in range(len(xmm_reg_mgr_cls.all_regs)):
- mc.MOVSD_bx((ofs + i * coeff) * WORD + base_ofs, i)
+ for reg in xmm_reg_mgr_cls.all_regs:
+ v = reg.get_jitframe_position()
+ mc.MOVSD_bx(v * WORD + base_ofs, reg.value)
def _pop_all_regs_from_frame(self, mc, ignored_regs, withfloats,
callee_only=False):
diff --git a/rpython/jit/backend/x86/regalloc.py
b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -899,12 +899,12 @@
if box.type == REF and self.rm.is_still_alive(box):
assert not noregs
assert isinstance(loc, RegLoc)
- val = gpr_reg_mgr_cls.all_reg_indexes[loc.value]
+ val = loc.get_jitframe_position()
gcmap[val // WORD // 8] |= r_uint(1) << (val % (WORD * 8))
for box, loc in self.fm.bindings.iteritems():
if box.type == REF and self.rm.is_still_alive(box):
assert isinstance(loc, FrameLoc)
- val = loc.position + JITFRAME_FIXED_SIZE
+ val = loc.get_jitframe_position()
gcmap[val // WORD // 8] |= r_uint(1) << (val % (WORD * 8))
return gcmap
diff --git a/rpython/jit/backend/x86/regloc.py
b/rpython/jit/backend/x86/regloc.py
--- a/rpython/jit/backend/x86/regloc.py
+++ b/rpython/jit/backend/x86/regloc.py
@@ -1,5 +1,6 @@
from rpython.jit.metainterp.history import ConstInt
from rpython.jit.backend.x86 import rx86
+from rpython.jit.backend.x86.arch import JITFRAME_FIXED_SIZE
from rpython.rlib.unroll import unrolling_iterable
from rpython.jit.backend.x86.arch import WORD, IS_X86_32, IS_X86_64
from rpython.tool.sourcetools import func_with_new_name
@@ -51,6 +52,9 @@
def get_position(self):
raise NotImplementedError # only for stack
+ def get_jitframe_position(self):
+ raise NotImplementedError
+
class RawEbpLoc(AssemblerLocation):
""" The same as stack location, but does not know it's position.
Mostly usable for raw frame access
@@ -112,7 +116,7 @@
class FrameLoc(RawEbpLoc):
_immutable_ = True
-
+
def __init__(self, position, ebp_offset, type):
# _getregkey() returns self.value; the value returned must not
# conflict with RegLoc._getregkey(). It doesn't a bit by chance,
@@ -128,6 +132,9 @@
def get_position(self):
return self.position
+ def get_jitframe_position(self):
+ return self.position + JITFRAME_FIXED_SIZE
+
class RegLoc(AssemblerLocation):
_immutable_ = True
def __init__(self, regnum, is_xmm):
@@ -172,6 +179,18 @@
def is_core_reg(self):
return True
+ def get_jitframe_position(self):
+ from rpython.jit.backend.x86 import regalloc
+
+ if self.is_xmm:
+ ofs = len(regalloc.gpr_reg_mgr_cls.all_regs)
+ if IS_X86_64:
+ return ofs + self.value
+ else:
+ return ofs + 2 * self.value
+ else:
+ return regalloc.gpr_reg_mgr_cls.all_reg_indexes[self.value]
+
class ImmediateAssemblerLocation(AssemblerLocation):
_immutable_ = True
@@ -342,7 +361,7 @@
# we actually do:
# mov r11, 0xDEADBEEFDEADBEEF
# mov rax, [r11]
-#
+#
# NB: You can use the scratch register as a temporary register in
# assembler.py, but care must be taken when doing so. A call to a method in
# LocationCodeBuilder could clobber the scratch register when certain
@@ -638,7 +657,7 @@
CVTTSD2SI = _binaryop('CVTTSD2SI')
CVTSD2SS = _binaryop('CVTSD2SS')
CVTSS2SD = _binaryop('CVTSS2SD')
-
+
SQRTSD = _binaryop('SQRTSD')
ANDPD = _binaryop('ANDPD')
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