Author: Armin Rigo <[email protected]>
Branch: stmgc-c7
Changeset: r70206:e9791bb17c6c
Date: 2014-03-23 16:23 +0100
http://bitbucket.org/pypy/pypy/changeset/e9791bb17c6c/
Log: fix
diff --git a/rpython/jit/backend/x86/assembler.py
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -1540,9 +1540,9 @@
src_addr = addr_add(segment, base_loc, ofs_loc, ofs.value, scale)
self.load_from_mem(resloc, src_addr, size_loc, sign_loc)
- def genop_getarrayitem_gc(self, op, arglocs, resloc, segment):
+ def genop_getarrayitem_gc(self, op, arglocs, resloc):
self._genop_getarrayitem(arglocs, resloc, self.SEGMENT_GC)
- def genop_getarrayitem_raw(self, op, arglocs, resloc, segment):
+ def genop_getarrayitem_raw(self, op, arglocs, resloc):
self._genop_getarrayitem(arglocs, resloc, self.SEGMENT_NO)
genop_getarrayitem_gc_pure = genop_getarrayitem_gc
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