Author: Armin Rigo <[email protected]>
Branch: stmgc-c7
Changeset: r72323:84e3bd9b16ad
Date: 2014-07-02 21:28 +0200
http://bitbucket.org/pypy/pypy/changeset/84e3bd9b16ad/

Log:    fixes

diff --git a/rpython/jit/backend/llsupport/llmodel.py 
b/rpython/jit/backend/llsupport/llmodel.py
--- a/rpython/jit/backend/llsupport/llmodel.py
+++ b/rpython/jit/backend/llsupport/llmodel.py
@@ -180,7 +180,7 @@
         STACK_CHECK_SLOWPATH = lltype.Ptr(lltype.FuncType([lltype.Signed],
                                                           lltype.Void))
         def insert_stack_check():
-            assert not self.cpu.gc_ll_descr.stm
+            assert not self.gc_ll_descr.stm
             endaddr = rstack._stack_get_end_adr()
             lengthaddr = rstack._stack_get_length_adr()
             f = llhelper(STACK_CHECK_SLOWPATH, rstack.stack_check_slowpath)
diff --git a/rpython/jit/backend/x86/assembler.py 
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -2743,9 +2743,7 @@
         addr0 = stmtlocal.threadlocal_base()
         addr = addr1 - addr0
         assert rx86.fits_in_32bits(addr)
-        mc = self.mc
-        mc.writechar(stmtlocal.SEGMENT_TL)     # prefix: %fs or %gs
-        mc.MOV_rj(resloc.value, addr)          # memory read
+        self.mc.MOV_rj(resloc.value, (stmtlocal.SEGMENT_TL, addr))
 
     def get_set_errno(self, op, loc, issue_a_write):
         # this function is only called on Linux
@@ -2753,23 +2751,23 @@
         addr = stmtlocal.get_errno_tl()
         assert rx86.fits_in_32bits(addr)
         mc = self.mc
-        mc.writechar(stmtlocal.SEGMENT_TL)     # prefix: %fs or %gs
-        # !!important: the *next* instruction must be the one using 'addr'!!
+        SEGTL = stmtlocal.SEGMENT_TL
         if issue_a_write:
             if isinstance(loc, RegLoc):
-                mc.MOV32_jr(addr, loc.value)       # memory write from reg
+                mc.MOV32_jr((SEGTL, addr), loc.value)  # memory write from reg
             else:
                 assert isinstance(loc, ImmedLoc)
                 newvalue = loc.value
                 newvalue = rffi.cast(rffi.INT, newvalue)
                 newvalue = rffi.cast(lltype.Signed, newvalue)
-                mc.MOV32_ji(addr, newvalue)        # memory write immediate
+                mc.MOV32_ji((SEGTL, addr), newvalue)  # memory write immediate
         else:
             assert isinstance(loc, RegLoc)
             if IS_X86_32:
-                mc.MOV_rj(loc.value, addr)         # memory read
+                mc.MOV_rj(loc.value, (SEGTL, addr))  # memory read
             elif IS_X86_64:
-                mc.MOVSX32_rj(loc.value, addr)     # memory read, sign-extend
+                mc.MOVSX32_rj(loc.value,
+                              (SEGTL, addr))        # memory read, sign-extend
 
 
 genop_discard_list = [Assembler386.not_implemented_op_discard] * rop._LAST
diff --git a/rpython/jit/backend/x86/callbuilder.py 
b/rpython/jit/backend/x86/callbuilder.py
--- a/rpython/jit/backend/x86/callbuilder.py
+++ b/rpython/jit/backend/x86/callbuilder.py
@@ -126,13 +126,12 @@
             self.asm.set_extra_stack_depth(self.mc, -delta * WORD)
             css_value = eax
         #
-        self.mc.MOV(heap(fastgil), css_value)
+        self.mc.MOV(heap(self.asm.SEGMENT_NO, fastgil), css_value)
         #
         if not we_are_translated():        # for testing: we should not access
             self.mc.ADD(ebp, imm(1))       # ebp any more; and ignore 'fastgil'
 
     def move_real_result_and_call_reacqgil_addr(self, fastgil):
-        from rpython.jit.backend.x86.assembler import heap
         from rpython.jit.backend.x86 import rx86
         #
         # check if we need to call the reacqgil() function or not
@@ -161,10 +160,11 @@
         #
         mc.MOV(old_value, imm(1))
         if rx86.fits_in_32bits(fastgil):
-            mc.XCHG_rj(old_value.value, fastgil)
+            mc.XCHG_rj(old_value.value, (self.asm.SEGMENT_NO, fastgil))
         else:
             mc.MOV_ri(X86_64_SCRATCH_REG.value, fastgil)
-            mc.XCHG_rm(old_value.value, (X86_64_SCRATCH_REG.value, 0))
+            mc.XCHG_rm(old_value.value,
+                       (self.asm.SEGMENT_NO, X86_64_SCRATCH_REG.value, 0))
         mc.CMP(old_value, css_value)
         mc.J_il8(rx86.Conditions['E'], 0)
         je_location = mc.get_relative_pos()
diff --git a/rpython/jit/metainterp/executor.py 
b/rpython/jit/metainterp/executor.py
--- a/rpython/jit/metainterp/executor.py
+++ b/rpython/jit/metainterp/executor.py
@@ -357,6 +357,7 @@
                          rop.DEBUG_MERGE_POINT,
                          rop.JIT_DEBUG,
                          rop.SETARRAYITEM_RAW,
+                         rop.SETINTERIORFIELD_RAW,
                          rop.CALL_PURE,
                          rop.CALL_RELEASE_GIL,
                          rop.QUASIIMMUT_FIELD,
diff --git a/rpython/jit/metainterp/optimizeopt/heap.py 
b/rpython/jit/metainterp/optimizeopt/heap.py
--- a/rpython/jit/metainterp/optimizeopt/heap.py
+++ b/rpython/jit/metainterp/optimizeopt/heap.py
@@ -267,6 +267,7 @@
             opnum == rop.SETFIELD_RAW or         # no effect on GC struct/array
             opnum == rop.SETARRAYITEM_GC or      # handled specially
             opnum == rop.SETARRAYITEM_RAW or     # no effect on GC struct
+            opnum == rop.SETINTERIORFIELD_RAW or # no effect on GC struct
             opnum == rop.RAW_STORE or            # no effect on GC struct
             opnum == rop.STRSETITEM or           # no effect on GC struct/array
             opnum == rop.UNICODESETITEM or       # no effect on GC struct/array
diff --git a/rpython/jit/metainterp/resoperation.py 
b/rpython/jit/metainterp/resoperation.py
--- a/rpython/jit/metainterp/resoperation.py
+++ b/rpython/jit/metainterp/resoperation.py
@@ -505,6 +505,7 @@
     'SETARRAYITEM_GC/3d',
     'SETARRAYITEM_RAW/3d',
     'SETINTERIORFIELD_GC/3d',
+    'SETINTERIORFIELD_RAW/3d',    # right now, only used by tests
     'RAW_STORE/3d',
     'SETFIELD_GC/2d',
     'SETFIELD_RAW/2d',
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