Author: Armin Rigo <ar...@tunes.org>
Branch: stmgc-c7-rewindjmp
Changeset: r72854:be297a6d9b9d
Date: 2014-08-17 20:38 +0200
http://bitbucket.org/pypy/pypy/changeset/be297a6d9b9d/
Log: Fix the remaining tests from llsupport/test/
diff --git a/rpython/jit/backend/llsupport/assembler.py
b/rpython/jit/backend/llsupport/assembler.py
--- a/rpython/jit/backend/llsupport/assembler.py
+++ b/rpython/jit/backend/llsupport/assembler.py
@@ -74,7 +74,7 @@
self.gc_minimal_size_in_nursery =
gc_ll_descr.minimal_size_in_nursery
else:
self.gc_minimal_size_in_nursery = 0
- if hasattr(gc_ll_descr, 'gcheaderbuilder'):
+ if getattr(gc_ll_descr, 'gcheaderbuilder', None) is not None:
self.gc_size_of_header = gc_ll_descr.gcheaderbuilder.size_gc_header
else:
self.gc_size_of_header = WORD # for tests
diff --git a/rpython/jit/backend/llsupport/regalloc.py
b/rpython/jit/backend/llsupport/regalloc.py
--- a/rpython/jit/backend/llsupport/regalloc.py
+++ b/rpython/jit/backend/llsupport/regalloc.py
@@ -650,8 +650,7 @@
def can_merge_with_next_guard(self, op, i, operations):
if (op.getopnum() == rop.CALL_MAY_FORCE or
op.getopnum() == rop.CALL_ASSEMBLER or
- op.getopnum() == rop.CALL_RELEASE_GIL or
- op.getopnum() == rop.STM_TRANSACTION_BREAK):
+ op.getopnum() == rop.CALL_RELEASE_GIL):
assert operations[i + 1].getopnum() == rop.GUARD_NOT_FORCED
return True
if (not op.is_comparison() and
diff --git a/rpython/jit/backend/llsupport/rewrite.py
b/rpython/jit/backend/llsupport/rewrite.py
--- a/rpython/jit/backend/llsupport/rewrite.py
+++ b/rpython/jit/backend/llsupport/rewrite.py
@@ -263,7 +263,7 @@
mallocs. (For all I know this latter case never occurs in
practice, but better safe than sorry.)
"""
- if self.gc_ll_descr.fielddescr_tid is not None:
+ if self.gc_ll_descr.fielddescr_tid is not None: # framework GC
assert (size & (WORD-1)) == 0, "size not aligned?"
addr = self.gc_ll_descr.get_malloc_fn_addr('malloc_big_fixedsize')
args = [ConstInt(addr), ConstInt(size), ConstInt(typeid)]
diff --git a/rpython/jit/backend/llsupport/test/test_gc.py
b/rpython/jit/backend/llsupport/test/test_gc.py
--- a/rpython/jit/backend/llsupport/test/test_gc.py
+++ b/rpython/jit/backend/llsupport/test/test_gc.py
@@ -184,7 +184,7 @@
rewriter = GcRewriterAssembler(gc_ll_descr, None)
newops = rewriter.newops
v_base = BoxPtr()
- rewriter.gen_write_barrier(v_base)
+ rewriter.gen_write_barrier(v_base, stm_location=None)
assert llop1.record == []
assert len(newops) == 1
assert newops[0].getopnum() == rop.COND_CALL_GC_WB
diff --git a/rpython/jit/backend/llsupport/test/test_gc_integration.py
b/rpython/jit/backend/llsupport/test/test_gc_integration.py
--- a/rpython/jit/backend/llsupport/test/test_gc_integration.py
+++ b/rpython/jit/backend/llsupport/test/test_gc_integration.py
@@ -10,7 +10,7 @@
GcLLDescr_framework, GcCache, JitFrameDescrs
from rpython.jit.backend.detect_cpu import getcpuclass
from rpython.jit.backend.llsupport.symbolic import WORD
-from rpython.jit.backend.llsupport import jitframe
+from rpython.jit.backend.llsupport import jitframe, gcmap
from rpython.rtyper.lltypesystem import lltype, llmemory, rffi
from rpython.rtyper.annlowlevel import llhelper, llhelper_args
@@ -315,11 +315,13 @@
def test_malloc_slowpath(self):
def check(frame):
- expected_size = 1
+ # xxx for now we always have GCMAP_STM_LOCATION, but it should
+ # be added only if we really have stm in the first place
+ expected_size = 1 + gcmap.GCMAP_STM_LOCATION
idx = 0
if self.cpu.backend_name.startswith('arm'):
# jitframe fixed part is larger here
- expected_size = 2
+ expected_size = 2 + gcmap.GCMAP_STM_LOCATION
idx = 1
assert len(frame.jf_gcmap) == expected_size
if self.cpu.IS_64_BIT:
@@ -355,11 +357,11 @@
def check(frame):
x = frame.jf_gcmap
if self.cpu.IS_64_BIT:
- assert len(x) == 1
+ assert len(x) == 1 + gcmap.GCMAP_STM_LOCATION
assert (bin(x[0]).count('1') ==
'0b1111100000000000000001111111011110'.count('1'))
else:
- assert len(x) == 2
+ assert len(x) == 2 + gcmap.GCMAP_STM_LOCATION
s = bin(x[0]).count('1') + bin(x[1]).count('1')
assert s == 16
# all but two registers + some stuff on stack
diff --git a/rpython/jit/backend/x86/assembler.py
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -915,7 +915,16 @@
self.mc.MOV(self.heap_shadowstack_top(), ecx)
else:
# SUB [rootstacktop], WORD
- self.mc.SUB(self.heap_shadowstack_top(), WORD)
+ gcrootmap = self.cpu.gc_ll_descr.gcrootmap
+ rst = gcrootmap.get_root_stack_top_addr()
+ if rx86.fits_in_32bits(rst):
+ # SUB [rootstacktop], WORD
+ self.mc.SUB_ji8((self.SEGMENT_NO, rst), WORD)
+ else:
+ # MOV ebx, rootstacktop
+ # SUB [ebx], WORD
+ self.mc.MOV_ri(ebx.value, rst)
+ self.mc.SUB_mi8((self.SEGMENT_NO, ebx.value, 0), WORD)
def redirect_call_assembler(self, oldlooptoken, newlooptoken):
# some minimal sanity checking
@@ -2616,7 +2625,7 @@
else:
self.implement_guard(guard_token, 'AE') # JAE goes to "no, don't"
- def genop_guard_stm_transaction_break(self, op, guard_op, guard_token,
+ def XXXgenop_guard_stm_transaction_break(self, op, guard_op, guard_token,
arglocs, result_loc):
assert self.cpu.gc_ll_descr.stm
if not we_are_translated():
diff --git a/rpython/jit/backend/x86/regalloc.py
b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -1292,7 +1292,7 @@
need_lower_byte=True)
self.perform(op, [], resloc)
- def consider_stm_transaction_break(self, op, guard_op):
+ def XXXconsider_stm_transaction_break(self, op, guard_op):
self.perform_with_guard(op, guard_op, [], None)
def consider_jump(self, op):
@@ -1444,7 +1444,6 @@
or num == rop.CALL_MAY_FORCE
or num == rop.CALL_ASSEMBLER
or num == rop.CALL_RELEASE_GIL
- or num == rop.STM_TRANSACTION_BREAK
or num == rop.STM_SHOULD_BREAK_TRANSACTION):
oplist_with_guard[num] = value
oplist[num] = add_none_argument(value)
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