Author: Maciej Fijalkowski <[email protected]>
Branch: vmprof
Changeset: r75719:f2c96b90445b
Date: 2015-02-05 12:58 +0200
http://bitbucket.org/pypy/pypy/changeset/f2c96b90445b/
Log: a bit blind fix
diff --git a/rpython/jit/backend/arm/regalloc.py
b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -392,6 +392,9 @@
else:
self.rm._sync_var(v)
+ def prepare_op_debug_merge_point(self, op, fcond):
+ self.assembler.codemap.debug_merge_point(op)
+
def _prepare_op_int_add(self, op, fcond):
boxes = op.getarglist()
a0, a1 = boxes
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