Author: Armin Rigo <[email protected]>
Branch:
Changeset: r78037:14b17ac4fe7f
Date: 2015-06-12 00:02 +0200
http://bitbucket.org/pypy/pypy/changeset/14b17ac4fe7f/
Log: Issue #2060: one more case
diff --git a/rpython/jit/backend/x86/assembler.py
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -2434,7 +2434,7 @@
while i < nbytes:
addr = addr_add(base_loc, startindex_loc, baseofs + i, scale)
current = nbytes - i
- if current >= 16:
+ if current >= 16 and self.cpu.supports_floats:
current = 16
if not null_reg_cleared:
self.mc.XORPS_xx(null_loc.value, null_loc.value)
_______________________________________________
pypy-commit mailing list
[email protected]
https://mail.python.org/mailman/listinfo/pypy-commit
