Author: Richard Plangger <[email protected]>
Branch: s390x-backend
Changeset: r80336:cff394b2f479
Date: 2015-10-19 16:42 +0200
http://bitbucket.org/pypy/pypy/changeset/cff394b2f479/
Log: first loop (that includes a branching instruction on condition),
substract and register move added to instructions
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -50,12 +50,11 @@
return clt.asmmemmgr_blocks
def gen_func_prolog(self):
- self.mc.STMG(reg.r11, reg.r15, loc.addr(reg.sp, -96))
+ self.mc.STMG(reg.r11, reg.r15, loc.addr(-96, reg.sp))
self.mc.AHI(reg.sp, loc.imm(-96))
- #self.mc.LAY(reg.r15, loc.addr(reg.sp, -))
def gen_func_epilog(self):
- self.mc.LMG(reg.r11, reg.r15, loc.addr(reg.sp, 0))
+ self.mc.LMG(reg.r11, reg.r15, loc.addr(0, reg.sp))
self.jmpto(reg.r14)
def jmpto(self, register):
diff --git a/rpython/jit/backend/zarch/codebuilder.py
b/rpython/jit/backend/zarch/codebuilder.py
--- a/rpython/jit/backend/zarch/codebuilder.py
+++ b/rpython/jit/backend/zarch/codebuilder.py
@@ -96,8 +96,7 @@
self.writechar(chr(operands))
return encode_rr
-def build_rre(mnemonic, (opcode,)):
- opcode1,opcode2 = opcode
+def build_rre(mnemonic, (opcode1,opcode2)):
@builder.arguments('r,r')
def encode_rr(self, reg1, reg2):
self.writechar(opcode1)
@@ -269,8 +268,8 @@
_mnemonic_codes = {
'AR': (build_rr, ['\x1A']),
- 'AGR': (build_rre, ['\xB9\x08']),
- 'AGFR': (build_rre, ['\xB9\x18']),
+ 'AGR': (build_rre, ['\xB9','\x08']),
+ 'AGFR': (build_rre, ['\xB9','\x18']),
'A': (build_rx, ['\x5A']),
'AY': (build_rxy, ['\xE3','\x5A']),
'AG': (build_rxy, ['\xE3','\x08']),
@@ -283,6 +282,9 @@
'BRXH': (build_rsi, ['\x84']),
'BRXLG': (build_rie, ['\xEC','\x45']),
'BCR': (build_rr, ['\x07']),
+ 'BC': (build_rx, ['\x47']),
+ 'BRC': (build_ri, ['\xA7','\x04']),
+ 'BRCL': (build_ril, ['\xC0','\x04']),
#
'NI': (build_si, ['\x94']),
'NIY': (build_siy, ['\xEB','\x54']),
@@ -295,9 +297,13 @@
'LMD': (build_sse, ['\xEF']),
'LMG': (build_rsy, ['\xEB','\x04']),
'LGHI': (build_ri, ['\xA7','\x09']),
+ 'LR': (build_rr, ['\x18']),
+ 'LGR': (build_rre, ['\xB9','\x04']),
'PKA': (build_ssf, ['\xE9']),
'STMG': (build_rsy, ['\xEB','\x24']),
+ 'SR': (build_rr, ['\x1B']),
+ 'SGR': (build_rre, ['\xB9','\x09']),
}
def build_unpack_func(mnemonic, func):
diff --git a/rpython/jit/backend/zarch/conditions.py
b/rpython/jit/backend/zarch/conditions.py
--- a/rpython/jit/backend/zarch/conditions.py
+++ b/rpython/jit/backend/zarch/conditions.py
@@ -0,0 +1,9 @@
+
+from rpython.jit.backend.zarch import locations as loc
+
+EQ = loc.imm(0x8)
+LT = loc.imm(0x4)
+GT = loc.imm(0x2)
+LE = loc.imm(EQ.value | LT.value)
+GE = loc.imm(EQ.value | GT.value)
+OVERFLOW = loc.imm(0x1)
diff --git a/rpython/jit/backend/zarch/locations.py
b/rpython/jit/backend/zarch/locations.py
--- a/rpython/jit/backend/zarch/locations.py
+++ b/rpython/jit/backend/zarch/locations.py
@@ -171,13 +171,16 @@
_immutable_ = True
def __init__(self, basereg, indexreg, displace):
- self.base = basereg.value
self.displace = displace
- self.index = 0 # designates the absense of an index register!
+ # designates the absense of an index/base register!
+ self.base = 0
+ self.index = 0
+ if basereg:
+ self.base = basereg.value
if indexreg:
self.index = indexreg.value
-def addr(basereg, displace, indexreg=None):
+def addr(displace, basereg=None, indexreg=None):
return AddressLocation(basereg, indexreg, displace)
def imm(i):
diff --git a/rpython/jit/backend/zarch/test/test_assembler.py
b/rpython/jit/backend/zarch/test/test_assembler.py
--- a/rpython/jit/backend/zarch/test/test_assembler.py
+++ b/rpython/jit/backend/zarch/test/test_assembler.py
@@ -48,10 +48,11 @@
def test_simple_func(self):
# enter
- self.a.mc.STMG(reg.r11, reg.r15, loc.addr(reg.sp, -96))
+ self.a.mc.STMG(reg.r11, reg.r15, loc.addr(-96, reg.sp))
self.a.mc.AHI(reg.sp, loc.imm(-96))
+ # from the start of BRASL to end of jmpto there are 8+6 bytes
self.a.mc.BRASL(reg.r14, loc.imm(8+6))
- self.a.mc.LMG(reg.r11, reg.r15, loc.addr(reg.sp, 0))
+ self.a.mc.LMG(reg.r11, reg.r15, loc.addr(0, reg.sp))
self.a.jmpto(reg.r14)
addr = self.a.mc.get_relative_pos()
@@ -61,3 +62,14 @@
self.a.gen_func_epilog()
assert run_asm(self.a) == 321
+ def test_simple_loop(self):
+ self.a.mc.LGHI(reg.r3, loc.imm(2**15-1))
+ self.a.mc.LGHI(reg.r4, loc.imm(1))
+ L1 = self.a.mc.get_relative_pos()
+ self.a.mc.SGR(reg.r3, reg.r4)
+ LJ = self.a.mc.get_relative_pos()
+ self.a.mc.BRCL(loc.imm(0x2), loc.imm(L1-LJ))
+ self.a.mc.LGR(reg.r2, reg.r3)
+ self.a.jmpto(reg.r14)
+ assert run_asm(self.a) == 0
+
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