Author: Richard Plangger <[email protected]>
Branch: s390x-backend
Changeset: r80497:6fbf6c1ae931
Date: 2015-11-02 10:43 +0100
http://bitbucket.org/pypy/pypy/changeset/6fbf6c1ae931/
Log: first loop correctly assembled. it is correctly entered, correctly
calulating the counter variable and cleanly exiting back to the VM
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -456,7 +456,9 @@
def _push_fp_regs_to_jitframe(self, mc, includes=r.MANAGED_FP_REGS):
base_ofs = self.cpu.get_baseofs_of_frame_field()
assert len(includes) == 16
- mc.LMG(r.r0, r.r15, l.addr(base_ofs, r.SPP))
+ v = 16
+ for i,reg in enumerate(includes):
+ mc.STD(reg, l.addr(base_ofs + (v+i) * WORD, r.SPP))
# ________________________________________
# ASSEMBLER EMISSION
diff --git a/rpython/jit/backend/zarch/codebuilder.py
b/rpython/jit/backend/zarch/codebuilder.py
--- a/rpython/jit/backend/zarch/codebuilder.py
+++ b/rpython/jit/backend/zarch/codebuilder.py
@@ -110,7 +110,7 @@
print "reserve!", self.get_relative_pos()
self.BRC(l.imm(0x0), l.imm(0))
- def cmp_op(self, a, b, pool=False, signed=True, fp=False):
+ def cmp_op(self, a, b, pool=False, imm=False, signed=True, fp=False):
if fp == True:
xxx
self.fcmpu(a, b)
@@ -119,6 +119,8 @@
if pool:
# 64 bit immediate signed
self.CLG(a, b)
+ elif imm:
+ self.CGHI(a, b)
else:
# 64 bit signed
self.CLGR(a, b)
@@ -126,6 +128,8 @@
if pool:
# 64 bit immediate unsigned
self.CG(a, b)
+ elif imm:
+ raise NotImplementedError
else:
# 64 bit unsigned
self.CGR(a, b)
diff --git a/rpython/jit/backend/zarch/conditions.py
b/rpython/jit/backend/zarch/conditions.py
--- a/rpython/jit/backend/zarch/conditions.py
+++ b/rpython/jit/backend/zarch/conditions.py
@@ -1,15 +1,28 @@
+from rpython.jit.backend.zarch import locations as loc
+from rpython.rlib.objectmodel import specialize
-from rpython.jit.backend.zarch import locations as loc
EQ = loc.imm(0x8)
LT = loc.imm(0x4)
GT = loc.imm(0x2)
+OF = loc.imm(0x1)
LE = loc.imm(EQ.value | LT.value)
GE = loc.imm(EQ.value | GT.value)
NE = loc.imm(LT.value | GT.value)
-OVERFLOW = loc.imm(0x1)
cond_none = loc.imm(0x0)
-def negate(cond):
- return cond
[email protected](1)
+def negate(cond, inv_overflow=False):
+ overflow = cond.value & 0x1
+ if inv_overflow:
+ assert False
+ value = (~cond.value) & 0xe
+ return loc.imm(value | overflow)
+
+assert negate(EQ).value == NE.value
+assert negate(NE).value == EQ.value
+assert negate(LT).value == GE.value
+assert negate(LE).value == GT.value
+assert negate(GT).value == LE.value
+assert negate(GE).value == LT.value
diff --git a/rpython/jit/backend/zarch/helper/assembler.py
b/rpython/jit/backend/zarch/helper/assembler.py
--- a/rpython/jit/backend/zarch/helper/assembler.py
+++ b/rpython/jit/backend/zarch/helper/assembler.py
@@ -39,7 +39,7 @@
l1 = arglocs[1]
assert not l0.is_imm()
# do the comparison
- self.mc.cmp_op(l0, l1, pool=l1.is_in_pool(), signed=signed, fp=fp)
+ self.mc.cmp_op(l0, l1, pool=l1.is_in_pool(), imm=l1.is_imm(),
signed=signed, fp=fp)
# CR bits:
# 0: LT
diff --git a/rpython/jit/backend/zarch/instructions.py
b/rpython/jit/backend/zarch/instructions.py
--- a/rpython/jit/backend/zarch/instructions.py
+++ b/rpython/jit/backend/zarch/instructions.py
@@ -28,6 +28,7 @@
'CG': ('rxy', ['\xE3','\x20']),
'CLGR': ('rre', ['\xB9','\x21']),
'CLG': ('rxy', ['\xE3','\x20']),
+ 'CGHI': ('ri', ['\xA7','\x0F']),
}
logic_mnemonic_codes = {
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