Author: Richard Plangger <[email protected]>
Branch: s390x-backend
Changeset: r80734:74ffc8d6b4fd
Date: 2015-11-17 20:10 +0100
http://bitbucket.org/pypy/pypy/changeset/74ffc8d6b4fd/
Log: passing one more test after fixing the flush_cc call in int_is_true,
int_is_zero
diff --git a/rpython/jit/backend/zarch/opassembler.py
b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -115,12 +115,12 @@
def emit_int_is_zero(self, op, arglocs, regalloc):
l0 = arglocs[0]
self.mc.CGHI(l0, l.imm(0))
- self.flush_cc(c.EQ, l0)
+ self.flush_cc(c.EQ, r.SPP)
def emit_int_is_true(self, op, arglocs, regalloc):
l0 = arglocs[0]
self.mc.CGHI(l0, l.imm(0))
- self.flush_cc(c.NE, l0)
+ self.flush_cc(c.NE, r.SPP)
emit_int_and = gen_emit_rr_or_rpool("NGR", "NG")
emit_int_or = gen_emit_rr_or_rpool("OGR", "OG")
@@ -137,6 +137,11 @@
emit_int_eq = gen_emit_cmp_op(c.EQ)
emit_int_ne = gen_emit_cmp_op(c.NE)
+ emit_uint_le = gen_emit_cmp_op(c.LE, signed=False)
+ emit_uint_lt = gen_emit_cmp_op(c.LT, signed=False)
+ emit_uint_gt = gen_emit_cmp_op(c.GT, signed=False)
+ emit_uint_ge = gen_emit_cmp_op(c.GE, signed=False)
+
class FloatOpAssembler(object):
_mixin_ = True
diff --git a/rpython/jit/backend/zarch/regalloc.py
b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -624,6 +624,11 @@
prepare_int_eq = helper.prepare_cmp_op
prepare_int_ne = helper.prepare_cmp_op
+ prepare_uint_le = helper.prepare_cmp_op
+ prepare_uint_lt = helper.prepare_cmp_op
+ prepare_uint_ge = helper.prepare_cmp_op
+ prepare_uint_gt = helper.prepare_cmp_op
+
prepare_int_is_zero = helper.prepare_unary_op
prepare_int_is_true = helper.prepare_unary_op
prepare_int_neg = helper.prepare_unary_op
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