Author: Richard Plangger <[email protected]>
Branch: s390x-backend
Changeset: r80884:52e2814e517d
Date: 2015-11-24 11:53 +0100
http://bitbucket.org/pypy/pypy/changeset/52e2814e517d/
Log: copy copy copy. void operations such as jit_debug. test passes
diff --git a/rpython/jit/backend/zarch/opassembler.py
b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -411,3 +411,14 @@
self.mc.AGHI(scratch, l.imm(1))
self.mc.STG(scratch, l.addr(0,addr))
+ def emit_debug_merge_point(self, op, arglocs, regalloc):
+ pass
+
+ emit_jit_debug = emit_debug_merge_point
+ emit_keepalive = emit_debug_merge_point
+
+ def emit_enter_portal_frame(self, op, arglocs, regalloc):
+ self.enter_portal_frame(op)
+
+ def emit_leave_portal_frame(self, op, arglocs, regalloc):
+ self.leave_portal_frame(op)
diff --git a/rpython/jit/backend/zarch/regalloc.py
b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -707,6 +707,15 @@
prepare_same_as_r = helper.prepare_same_as
prepare_same_as_f = helper.prepare_same_as
+ def void(self, op):
+ return []
+
+ prepare_debug_merge_point = void
+ prepare_jit_debug = void
+ prepare_keepalive = void
+ prepare_enter_portal_frame = void
+ prepare_leave_portal_frame = void
+
def prepare_cast_int_to_float(self, op):
loc1 = self.ensure_reg(op.getarg(0))
res = self.fprm.force_allocate_reg(op)
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