Author: Richard Plangger <[email protected]>
Branch: s390x-backend
Changeset: r80893:5810bdb5f4eb
Date: 2015-11-24 16:33 +0100
http://bitbucket.org/pypy/pypy/changeset/5810bdb5f4eb/

Log:    copy copy copy. ptr_eq and ptr_ne added to regalloc and assembler

diff --git a/rpython/jit/backend/zarch/opassembler.py 
b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -91,27 +91,7 @@
     emit_uint_floordiv = gen_emit_pool_or_rr_evenodd('DLG','DLGR')
     # NOTE division sets one register with the modulo value, thus
     # the regalloc ensures the right register survives.
-    #emit_int_mod = gen_emit_pool_or_rr_evenodd('DSG','DSGR')
-    def emit_int_mod(self, op, arglocs, regalloc):
-        lr, lq, l1 = arglocs # lr == remainer, lq == quotient
-        # when entering the function lr contains the dividend
-        # after this operation either lr or lq is used further
-        assert l1.is_in_pool() or not l1.is_imm() , "imm divider not supported"
-        # remainer is always a even register r0, r2, ... , r14
-        assert lr.is_even()
-        assert lq.is_odd()
-        if l1.is_in_pool():
-            self.mc.DSG(lr, l1)
-            # python behavior?
-            #off = self.mc.CGIJ_byte_count+self.mc.AG_byte_count
-            #self.mc.CGIJ(lr, l.imm(0), c.GE, l.imm(off))
-            #self.mc.AG(lr, l1)
-        else:
-            self.mc.DSGR(lr, l1)
-            # python behavior?
-            #off = self.mc.CGIJ_byte_count+self.mc.AGR_byte_count
-            #self.mc.CGIJ(lr, l.imm(0), c.GE, l.imm(off))
-            #self.mc.AGR(lr, l1)
+    emit_int_mod = gen_emit_pool_or_rr_evenodd('DSG','DSGR')
 
     def emit_int_invert(self, op, arglocs, regalloc):
         l0, = arglocs
@@ -165,6 +145,12 @@
     emit_int_eq = gen_emit_cmp_op(c.EQ)
     emit_int_ne = gen_emit_cmp_op(c.NE)
 
+    emit_ptr_eq = emit_int_eq
+    emit_ptr_ne = emit_int_ne
+
+    emit_instance_ptr_eq = emit_ptr_eq
+    emit_instance_ptr_ne = emit_ptr_ne
+
     emit_uint_le = gen_emit_cmp_op(c.LE, signed=False)
     emit_uint_lt = gen_emit_cmp_op(c.LT, signed=False)
     emit_uint_gt = gen_emit_cmp_op(c.GT, signed=False)
diff --git a/rpython/jit/backend/zarch/regalloc.py 
b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -668,6 +668,12 @@
     prepare_int_eq = helper.generate_cmp_op()
     prepare_int_ne = helper.generate_cmp_op()
 
+    prepare_ptr_eq = prepare_int_eq
+    prepare_ptr_ne = prepare_int_ne
+
+    prepare_instance_ptr_eq = prepare_ptr_eq
+    prepare_instance_ptr_ne = prepare_ptr_ne
+
     prepare_uint_le = helper.generate_cmp_op(signed=False)
     prepare_uint_lt = helper.generate_cmp_op(signed=False)
     prepare_uint_ge = helper.generate_cmp_op(signed=False)
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