Author: Armin Rigo <[email protected]>
Branch:
Changeset: r81461:e82aaf75618b
Date: 2015-12-28 19:33 +0100
http://bitbucket.org/pypy/pypy/changeset/e82aaf75618b/
Log: fix the ppc backend for the new gc_load/gc_store interface
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit/backend/ppc/opassembler.py
--- a/rpython/jit/backend/ppc/opassembler.py
+++ b/rpython/jit/backend/ppc/opassembler.py
@@ -20,7 +20,7 @@
PPCBuilder, PPCGuardToken)
from rpython.jit.backend.ppc.regalloc import TempPtr, TempInt
from rpython.jit.backend.llsupport import symbolic, jitframe
-from rpython.jit.backend.llsupport.descr import InteriorFieldDescr, CallDescr
+from rpython.jit.backend.llsupport.descr import CallDescr
from rpython.jit.backend.llsupport.gcmap import allocate_gcmap
from rpython.rtyper.lltypesystem import rstr, rffi, lltype
from rpython.rtyper.annlowlevel import cast_instance_to_gcref
@@ -706,8 +706,10 @@
_mixin_ = True
- def _write_to_mem(self, value_loc, base_loc, ofs, size):
- if size.value == 8:
+ def _write_to_mem(self, value_loc, base_loc, ofs, size_loc):
+ assert size_loc.is_imm()
+ size = size_loc.value
+ if size == 8:
if value_loc.is_fp_reg():
if ofs.is_imm():
self.mc.stfd(value_loc.value, base_loc.value, ofs.value)
@@ -718,17 +720,17 @@
self.mc.std(value_loc.value, base_loc.value, ofs.value)
else:
self.mc.stdx(value_loc.value, base_loc.value, ofs.value)
- elif size.value == 4:
+ elif size == 4:
if ofs.is_imm():
self.mc.stw(value_loc.value, base_loc.value, ofs.value)
else:
self.mc.stwx(value_loc.value, base_loc.value, ofs.value)
- elif size.value == 2:
+ elif size == 2:
if ofs.is_imm():
self.mc.sth(value_loc.value, base_loc.value, ofs.value)
else:
self.mc.sthx(value_loc.value, base_loc.value, ofs.value)
- elif size.value == 1:
+ elif size == 1:
if ofs.is_imm():
self.mc.stb(value_loc.value, base_loc.value, ofs.value)
else:
@@ -736,18 +738,35 @@
else:
assert 0, "size not supported"
- def emit_setfield_gc(self, op, arglocs, regalloc):
- value_loc, base_loc, ofs, size = arglocs
- self._write_to_mem(value_loc, base_loc, ofs, size)
+ def emit_gc_store(self, op, arglocs, regalloc):
+ value_loc, base_loc, ofs_loc, size_loc = arglocs
+ self._write_to_mem(value_loc, base_loc, ofs_loc, size_loc)
- emit_setfield_raw = emit_setfield_gc
- emit_zero_ptr_field = emit_setfield_gc
+ def _apply_offset(self, index_loc, ofs_loc):
+ # If offset != 0 then we have to add it here. Note that
+ # mc.addi() would not be valid with operand r0.
+ assert ofs_loc.is_imm() # must be an immediate...
+ assert _check_imm_arg(ofs_loc.getint()) # ...that fits 16 bits
+ assert index_loc is not r.SCRATCH2
+ # (simplified version of _apply_scale())
+ if ofs_loc.value > 0:
+ self.mc.addi(r.SCRATCH2.value, index_loc.value, ofs_loc.value)
+ index_loc = r.SCRATCH2
+ return index_loc
- def _load_from_mem(self, res, base_loc, ofs, size, signed):
+ def emit_gc_store_indexed(self, op, arglocs, regalloc):
+ base_loc, index_loc, value_loc, ofs_loc, size_loc = arglocs
+ index_loc = self._apply_offset(index_loc, ofs_loc)
+ self._write_to_mem(value_loc, base_loc, index_loc, size_loc)
+
+ def _load_from_mem(self, res, base_loc, ofs, size_loc, sign_loc):
# res, base_loc, ofs, size and signed are all locations
assert base_loc is not r.SCRATCH
- sign = signed.value
- if size.value == 8:
+ assert size_loc.is_imm()
+ size = size_loc.value
+ assert sign_loc.is_imm()
+ sign = sign_loc.value
+ if size == 8:
if res.is_fp_reg():
if ofs.is_imm():
self.mc.lfd(res.value, base_loc.value, ofs.value)
@@ -758,7 +777,7 @@
self.mc.ld(res.value, base_loc.value, ofs.value)
else:
self.mc.ldx(res.value, base_loc.value, ofs.value)
- elif size.value == 4:
+ elif size == 4:
if IS_PPC_64 and sign:
if ofs.is_imm():
self.mc.lwa(res.value, base_loc.value, ofs.value)
@@ -769,7 +788,7 @@
self.mc.lwz(res.value, base_loc.value, ofs.value)
else:
self.mc.lwzx(res.value, base_loc.value, ofs.value)
- elif size.value == 2:
+ elif size == 2:
if sign:
if ofs.is_imm():
self.mc.lha(res.value, base_loc.value, ofs.value)
@@ -780,7 +799,7 @@
self.mc.lhz(res.value, base_loc.value, ofs.value)
else:
self.mc.lhzx(res.value, base_loc.value, ofs.value)
- elif size.value == 1:
+ elif size == 1:
if ofs.is_imm():
self.mc.lbz(res.value, base_loc.value, ofs.value)
else:
@@ -790,22 +809,28 @@
else:
assert 0, "size not supported"
- def _genop_getfield(self, op, arglocs, regalloc):
- base_loc, ofs, res, size, sign = arglocs
- self._load_from_mem(res, base_loc, ofs, size, sign)
+ def _genop_gc_load(self, op, arglocs, regalloc):
+ base_loc, ofs_loc, res_loc, size_loc, sign_loc = arglocs
+ self._load_from_mem(res_loc, base_loc, ofs_loc, size_loc, sign_loc)
- emit_getfield_gc_i = _genop_getfield
- emit_getfield_gc_r = _genop_getfield
- emit_getfield_gc_f = _genop_getfield
- emit_getfield_gc_pure_i = _genop_getfield
- emit_getfield_gc_pure_r = _genop_getfield
- emit_getfield_gc_pure_f = _genop_getfield
- emit_getfield_raw_i = _genop_getfield
- emit_getfield_raw_f = _genop_getfield
+ emit_gc_load_i = _genop_gc_load
+ emit_gc_load_r = _genop_gc_load
+ emit_gc_load_f = _genop_gc_load
+
+ def _genop_gc_load_indexed(self, op, arglocs, regalloc):
+ base_loc, index_loc, res_loc, ofs_loc, size_loc, sign_loc = arglocs
+ index_loc = self._apply_offset(index_loc, ofs_loc)
+ self._load_from_mem(res_loc, base_loc, index_loc, size_loc, sign_loc)
+
+ emit_gc_load_indexed_i = _genop_gc_load_indexed
+ emit_gc_load_indexed_r = _genop_gc_load_indexed
+ emit_gc_load_indexed_f = _genop_gc_load_indexed
SIZE2SCALE = dict([(1<<_i, _i) for _i in range(32)])
def _multiply_by_constant(self, loc, multiply_by, scratch_loc):
+ # XXX should die together with _apply_scale() but can't because
+ # of emit_zero_array() and malloc_cond_varsize() at the moment
assert loc.is_reg()
if multiply_by == 1:
return loc
@@ -827,6 +852,9 @@
return scratch_loc
def _apply_scale(self, ofs, index_loc, itemsize):
+ # XXX should die now that getarrayitem and getinteriorfield are gone
+ # but can't because of emit_zero_array() at the moment
+
# For arrayitem and interiorfield reads and writes: this returns an
# offset suitable for use in ld/ldx or similar instructions.
# The result will be either the register r2 or a 16-bit immediate.
@@ -857,44 +885,6 @@
index_loc = r.SCRATCH2
return index_loc
- def _genop_getarray_or_interiorfield(self, op, arglocs, regalloc):
- (base_loc, index_loc, res_loc, ofs_loc,
- itemsize, fieldsize, fieldsign) = arglocs
- ofs_loc = self._apply_scale(ofs_loc, index_loc, itemsize)
- self._load_from_mem(res_loc, base_loc, ofs_loc, fieldsize, fieldsign)
-
- emit_getinteriorfield_gc_i = _genop_getarray_or_interiorfield
- emit_getinteriorfield_gc_r = _genop_getarray_or_interiorfield
- emit_getinteriorfield_gc_f = _genop_getarray_or_interiorfield
-
- def emit_setinteriorfield_gc(self, op, arglocs, regalloc):
- (base_loc, index_loc, value_loc, ofs_loc,
- itemsize, fieldsize) = arglocs
- ofs_loc = self._apply_scale(ofs_loc, index_loc, itemsize)
- self._write_to_mem(value_loc, base_loc, ofs_loc, fieldsize)
-
- emit_setinteriorfield_raw = emit_setinteriorfield_gc
-
- def emit_arraylen_gc(self, op, arglocs, regalloc):
- res, base_loc, ofs = arglocs
- self.mc.load(res.value, base_loc.value, ofs.value)
-
- emit_setarrayitem_gc = emit_setinteriorfield_gc
- emit_setarrayitem_raw = emit_setarrayitem_gc
-
- emit_getarrayitem_gc_i = _genop_getarray_or_interiorfield
- emit_getarrayitem_gc_r = _genop_getarray_or_interiorfield
- emit_getarrayitem_gc_f = _genop_getarray_or_interiorfield
- emit_getarrayitem_gc_pure_i = _genop_getarray_or_interiorfield
- emit_getarrayitem_gc_pure_r = _genop_getarray_or_interiorfield
- emit_getarrayitem_gc_pure_f = _genop_getarray_or_interiorfield
- emit_getarrayitem_raw_i = _genop_getarray_or_interiorfield
- emit_getarrayitem_raw_f = _genop_getarray_or_interiorfield
-
- emit_raw_store = emit_setarrayitem_gc
- emit_raw_load_i = _genop_getarray_or_interiorfield
- emit_raw_load_f = _genop_getarray_or_interiorfield
-
def _copy_in_scratch2(self, loc):
if loc.is_imm():
self.mc.li(r.SCRATCH2.value, loc.value)
@@ -998,10 +988,6 @@
_mixin_ = True
- emit_strlen = FieldOpAssembler._genop_getfield
- emit_strgetitem = FieldOpAssembler._genop_getarray_or_interiorfield
- emit_strsetitem = FieldOpAssembler.emit_setarrayitem_gc
-
def emit_copystrcontent(self, op, arglocs, regalloc):
self._emit_copycontent(arglocs, is_unicode=False)
@@ -1059,12 +1045,8 @@
class UnicodeOpAssembler(object):
-
_mixin_ = True
-
- emit_unicodelen = FieldOpAssembler._genop_getfield
- emit_unicodegetitem = FieldOpAssembler._genop_getarray_or_interiorfield
- emit_unicodesetitem = FieldOpAssembler.emit_setarrayitem_gc
+ # empty!
class AllocOpAssembler(object):
diff --git a/rpython/jit/backend/ppc/regalloc.py
b/rpython/jit/backend/ppc/regalloc.py
--- a/rpython/jit/backend/ppc/regalloc.py
+++ b/rpython/jit/backend/ppc/regalloc.py
@@ -17,12 +17,9 @@
from rpython.rtyper.lltypesystem.lloperation import llop
from rpython.rtyper.annlowlevel import cast_instance_to_gcref
from rpython.jit.backend.llsupport import symbolic
-from rpython.jit.backend.llsupport.descr import ArrayDescr
+from rpython.jit.backend.llsupport.descr import unpack_arraydescr
import rpython.jit.backend.ppc.register as r
import rpython.jit.backend.ppc.condition as c
-from rpython.jit.backend.llsupport.descr import unpack_arraydescr
-from rpython.jit.backend.llsupport.descr import unpack_fielddescr
-from rpython.jit.backend.llsupport.descr import unpack_interiorfielddescr
from rpython.jit.backend.llsupport.gcmap import allocate_gcmap
from rpython.rlib.objectmodel import we_are_translated
from rpython.rlib.debug import debug_print
@@ -691,159 +688,69 @@
src_locations2, dst_locations2, fptmploc)
return []
- def prepare_setfield_gc(self, op):
- ofs, size, _ = unpack_fielddescr(op.getdescr())
+ def prepare_gc_store(self, op):
base_loc = self.ensure_reg(op.getarg(0))
- value_loc = self.ensure_reg(op.getarg(1))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(ofs))
- return [value_loc, base_loc, ofs_loc, imm(size)]
+ ofs_loc = self.ensure_reg_or_16bit_imm(op.getarg(1))
+ value_loc = self.ensure_reg(op.getarg(2))
+ size_loc = self.ensure_reg_or_any_imm(op.getarg(3))
+ return [value_loc, base_loc, ofs_loc, size_loc]
- prepare_setfield_raw = prepare_setfield_gc
+ def _prepare_gc_load(self, op):
+ base_loc = self.ensure_reg(op.getarg(0))
+ ofs_loc = self.ensure_reg_or_16bit_imm(op.getarg(1))
+ self.free_op_vars()
+ res_loc = self.force_allocate_reg(op)
+ size_box = op.getarg(2)
+ assert isinstance(size_box, ConstInt)
+ nsize = size_box.value # negative for "signed"
+ size_loc = imm(abs(nsize))
+ if nsize < 0:
+ sign = 1
+ else:
+ sign = 0
+ return [base_loc, ofs_loc, res_loc, size_loc, imm(sign)]
- def _prepare_getfield(self, op):
- ofs, size, sign = unpack_fielddescr(op.getdescr())
+ prepare_gc_load_i = _prepare_gc_load
+ prepare_gc_load_r = _prepare_gc_load
+ prepare_gc_load_f = _prepare_gc_load
+
+ def prepare_gc_store_indexed(self, op):
base_loc = self.ensure_reg(op.getarg(0))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(ofs))
+ index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
+ value_loc = self.ensure_reg(op.getarg(2))
+ assert op.getarg(3).getint() == 1 # scale
+ ofs_loc = self.ensure_reg_or_16bit_imm(op.getarg(4))
+ assert ofs_loc.is_imm() # the arg(4) should always be a small constant
+ size_loc = self.ensure_reg_or_any_imm(op.getarg(5))
+ return [base_loc, index_loc, value_loc, ofs_loc, size_loc]
+
+ def _prepare_gc_load_indexed(self, op):
+ base_loc = self.ensure_reg(op.getarg(0))
+ index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
+ assert op.getarg(2).getint() == 1 # scale
+ ofs_loc = self.ensure_reg_or_16bit_imm(op.getarg(3))
+ assert ofs_loc.is_imm() # the arg(3) should always be a small constant
self.free_op_vars()
- res = self.force_allocate_reg(op)
- return [base_loc, ofs_loc, res, imm(size), imm(sign)]
+ res_loc = self.force_allocate_reg(op)
+ size_box = op.getarg(4)
+ assert isinstance(size_box, ConstInt)
+ nsize = size_box.value # negative for "signed"
+ size_loc = imm(abs(nsize))
+ if nsize < 0:
+ sign = 1
+ else:
+ sign = 0
+ return [base_loc, index_loc, res_loc, ofs_loc, size_loc, imm(sign)]
- prepare_getfield_gc_i = _prepare_getfield
- prepare_getfield_gc_r = _prepare_getfield
- prepare_getfield_gc_f = _prepare_getfield
- prepare_getfield_raw_i = _prepare_getfield
- prepare_getfield_raw_f = _prepare_getfield
- prepare_getfield_gc_pure_i = _prepare_getfield
- prepare_getfield_gc_pure_r = _prepare_getfield
- prepare_getfield_gc_pure_f = _prepare_getfield
+ prepare_gc_load_indexed_i = _prepare_gc_load_indexed
+ prepare_gc_load_indexed_r = _prepare_gc_load_indexed
+ prepare_gc_load_indexed_f = _prepare_gc_load_indexed
def prepare_increment_debug_counter(self, op):
base_loc = self.ensure_reg(op.getarg(0))
temp_loc = r.SCRATCH2
return [base_loc, temp_loc]
- def _prepare_getinteriorfield(self, op):
- t = unpack_interiorfielddescr(op.getdescr())
- ofs, itemsize, fieldsize, sign = t
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(ofs))
- self.free_op_vars()
- result_loc = self.force_allocate_reg(op)
- return [base_loc, index_loc, result_loc, ofs_loc,
- imm(itemsize), imm(fieldsize), imm(sign)]
-
- prepare_getinteriorfield_gc_i = _prepare_getinteriorfield
- prepare_getinteriorfield_gc_r = _prepare_getinteriorfield
- prepare_getinteriorfield_gc_f = _prepare_getinteriorfield
-
- def prepare_setinteriorfield_gc(self, op):
- t = unpack_interiorfielddescr(op.getdescr())
- ofs, itemsize, fieldsize, _ = t
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- value_loc = self.ensure_reg(op.getarg(2))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(ofs))
- return [base_loc, index_loc, value_loc, ofs_loc,
- imm(itemsize), imm(fieldsize)]
-
- prepare_setinteriorfield_raw = prepare_setinteriorfield_gc
-
- def prepare_arraylen_gc(self, op):
- arraydescr = op.getdescr()
- assert isinstance(arraydescr, ArrayDescr)
- ofs = arraydescr.lendescr.offset
- assert _check_imm_arg(ofs)
- base_loc = self.ensure_reg(op.getarg(0))
- self.free_op_vars()
- res = self.force_allocate_reg(op)
- return [res, base_loc, imm(ofs)]
-
- def prepare_setarrayitem_gc(self, op):
- size, ofs, _ = unpack_arraydescr(op.getdescr())
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- value_loc = self.ensure_reg(op.getarg(2))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(ofs))
- imm_size = imm(size)
- return [base_loc, index_loc, value_loc, ofs_loc,
- imm_size, imm_size]
-
- prepare_setarrayitem_raw = prepare_setarrayitem_gc
-
- def prepare_raw_store(self, op):
- size, ofs, _ = unpack_arraydescr(op.getdescr())
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- value_loc = self.ensure_reg(op.getarg(2))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(ofs))
- return [base_loc, index_loc, value_loc, ofs_loc,
- imm(1), imm(size)]
-
- def _prepare_getarrayitem(self, op):
- size, ofs, sign = unpack_arraydescr(op.getdescr())
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(ofs))
- self.free_op_vars()
- result_loc = self.force_allocate_reg(op)
- imm_size = imm(size)
- return [base_loc, index_loc, result_loc, ofs_loc,
- imm_size, imm_size, imm(sign)]
-
- prepare_getarrayitem_gc_i = _prepare_getarrayitem
- prepare_getarrayitem_gc_r = _prepare_getarrayitem
- prepare_getarrayitem_gc_f = _prepare_getarrayitem
- prepare_getarrayitem_raw_i = _prepare_getarrayitem
- prepare_getarrayitem_raw_f = _prepare_getarrayitem
- prepare_getarrayitem_gc_pure_i = _prepare_getarrayitem
- prepare_getarrayitem_gc_pure_r = _prepare_getarrayitem
- prepare_getarrayitem_gc_pure_f = _prepare_getarrayitem
-
- def _prepare_raw_load(self, op):
- size, ofs, sign = unpack_arraydescr(op.getdescr())
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(ofs))
- self.free_op_vars()
- result_loc = self.force_allocate_reg(op)
- return [base_loc, index_loc, result_loc, ofs_loc,
- imm(1), imm(size), imm(sign)]
-
- prepare_raw_load_i = _prepare_raw_load
- prepare_raw_load_f = _prepare_raw_load
-
- def prepare_strlen(self, op):
- basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.STR,
- self.cpu.translate_support_code)
- base_loc = self.ensure_reg(op.getarg(0))
- self.free_op_vars()
- result_loc = self.force_allocate_reg(op)
- return [base_loc, imm(ofs_length), result_loc, imm(WORD), imm(0)]
-
- def prepare_strgetitem(self, op):
- basesize, itemsize, _ = symbolic.get_array_token(rstr.STR,
- self.cpu.translate_support_code)
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(basesize))
- self.free_op_vars()
- result_loc = self.force_allocate_reg(op)
- imm_size = imm(itemsize)
- return [base_loc, index_loc, result_loc, ofs_loc,
- imm_size, imm_size, imm(0)]
-
- def prepare_strsetitem(self, op):
- basesize, itemsize, _ = symbolic.get_array_token(rstr.STR,
- self.cpu.translate_support_code)
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- value_loc = self.ensure_reg(op.getarg(2))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(basesize))
- imm_size = imm(itemsize)
- return [base_loc, index_loc, value_loc, ofs_loc,
- imm_size, imm_size]
-
def prepare_copystrcontent(self, op):
src_ptr_loc = self.ensure_reg(op.getarg(0))
dst_ptr_loc = self.ensure_reg(op.getarg(1))
@@ -856,37 +763,6 @@
prepare_copyunicodecontent = prepare_copystrcontent
- def prepare_unicodelen(self, op):
- basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.UNICODE,
- self.cpu.translate_support_code)
- base_loc = self.ensure_reg(op.getarg(0))
- self.free_op_vars()
- result_loc = self.force_allocate_reg(op)
- return [base_loc, imm(ofs_length), result_loc, imm(WORD), imm(0)]
-
- def prepare_unicodegetitem(self, op):
- basesize, itemsize, _ = symbolic.get_array_token(rstr.UNICODE,
- self.cpu.translate_support_code)
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(basesize))
- self.free_op_vars()
- result_loc = self.force_allocate_reg(op)
- imm_size = imm(itemsize)
- return [base_loc, index_loc, result_loc, ofs_loc,
- imm_size, imm_size, imm(0)]
-
- def prepare_unicodesetitem(self, op):
- basesize, itemsize, _ = symbolic.get_array_token(rstr.UNICODE,
- self.cpu.translate_support_code)
- base_loc = self.ensure_reg(op.getarg(0))
- index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
- value_loc = self.ensure_reg(op.getarg(2))
- ofs_loc = self.ensure_reg_or_16bit_imm(ConstInt(basesize))
- imm_size = imm(itemsize)
- return [base_loc, index_loc, value_loc, ofs_loc,
- imm_size, imm_size]
-
prepare_same_as_i = helper.prepare_unary_op
prepare_same_as_r = helper.prepare_unary_op
prepare_same_as_f = helper.prepare_unary_op
@@ -1078,12 +954,6 @@
arglocs = self._prepare_guard(op)
return arglocs
- def prepare_zero_ptr_field(self, op):
- base_loc = self.ensure_reg(op.getarg(0))
- ofs_loc = self.ensure_reg_or_16bit_imm(op.getarg(1))
- value_loc = self.ensure_reg(ConstInt(0))
- return [value_loc, base_loc, ofs_loc, imm(WORD)]
-
def prepare_zero_array(self, op):
itemsize, ofs, _ = unpack_arraydescr(op.getdescr())
base_loc = self.ensure_reg(op.getarg(0))
diff --git a/rpython/jit/backend/ppc/runner.py
b/rpython/jit/backend/ppc/runner.py
--- a/rpython/jit/backend/ppc/runner.py
+++ b/rpython/jit/backend/ppc/runner.py
@@ -21,6 +21,9 @@
IS_64_BIT = True
backend_name = 'ppc64'
+ # can an ISA instruction handle a factor to the offset?
+ load_supported_factors = (1,)
+
from rpython.jit.backend.ppc.register import JITFRAME_FIXED_SIZE
frame_reg = r.SP
all_reg_indexes = [-1] * 32
diff --git a/rpython/jit/backend/x86/regalloc.py
b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -4,8 +4,7 @@
import os, sys
from rpython.jit.backend.llsupport import symbolic
-from rpython.jit.backend.llsupport.descr import (ArrayDescr, CallDescr,
- unpack_arraydescr, unpack_fielddescr, unpack_interiorfielddescr)
+from rpython.jit.backend.llsupport.descr import CallDescr, unpack_arraydescr
from rpython.jit.backend.llsupport.gcmap import allocate_gcmap
from rpython.jit.backend.llsupport.regalloc import (FrameManager, BaseRegalloc,
RegisterManager, TempVar, compute_vars_longevity, is_comparison_or_ovf_op,
@@ -1085,9 +1084,9 @@
result_loc = self.force_allocate_reg(op)
size_box = op.getarg(2)
assert isinstance(size_box, ConstInt)
- size = size_box.value
- size_loc = imm(abs(size))
- if size < 0:
+ nsize = size_box.value # negative for "signed"
+ size_loc = imm(abs(nsize))
+ if nsize < 0:
sign_loc = imm1
else:
sign_loc = imm0
@@ -1110,9 +1109,9 @@
assert isinstance(size_box, ConstInt)
scale = scale_box.value
offset = offset_box.value
- size = size_box.value
- size_loc = imm(abs(size))
- if size < 0:
+ nsize = size_box.value # negative for "signed"
+ size_loc = imm(abs(nsize))
+ if nsize < 0:
sign_loc = imm1
else:
sign_loc = imm0
_______________________________________________
pypy-commit mailing list
[email protected]
https://mail.python.org/mailman/listinfo/pypy-commit
