Author: Richard Plangger <planri...@gmail.com>
Branch: s390x-backend
Changeset: r81491:5670303748ca
Date: 2015-12-29 15:07 +0100
http://bitbucket.org/pypy/pypy/changeset/5670303748ca/

Log:    added guard_exception to regalloc+assembler

diff --git a/rpython/jit/backend/test/runner_test.py 
b/rpython/jit/backend/test/runner_test.py
--- a/rpython/jit/backend/test/runner_test.py
+++ b/rpython/jit/backend/test/runner_test.py
@@ -5049,6 +5049,7 @@
 
                         scalebox = ConstInt(arraydescr.itemsize)
                         inputargs, oplist = 
self._get_operation_list(ops,'void')
+                        # XXX
                         print("input:", inputargs)
                         for op in oplist:
                             print(op)
diff --git a/rpython/jit/backend/zarch/opassembler.py 
b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -680,7 +680,7 @@
         offset2 = self.cpu.subclassrange_min_offset
         if offset is not None:
             # read this field to get the vtable pointer
-            self.mc.load(r.SCRATCH2.value, loc_object.value, offset)
+            self.mc(r.SCRATCH2, l.addr(offset, loc_object))
             # read the vtable's subclassrange_min field
             assert check_imm(offset2)
             self.mc.ld(r.SCRATCH2.value, r.SCRATCH2.value, offset2)
@@ -729,6 +729,30 @@
         self._store_force_index(op)
         self.store_info_on_descr(0, guard_token)
 
+    def emit_guard_exception(self, op, arglocs, regalloc):
+        loc, resloc = arglocs[:2]
+        failargs = arglocs[2:]
+
+        mc = self.mc
+        mc.load_imm(r.SCRATCH, self.cpu.pos_exc_value())
+        diff = self.cpu.pos_exception() - self.cpu.pos_exc_value()
+        assert check_imm_value(diff)
+
+        mc.LG(r.SCRATCH2, l.addr(diff, r.SCRATCH))
+        if not loc.is_in_pool() and loc.is_imm():
+            mc.cmp_op(r.SCRATCH2, loc, imm=True)
+        else:
+            mc.cmp_op(r.SCRATCH2, loc, pool=loc.is_in_pool())
+        self.guard_success_cc = c.EQ
+        self._emit_guard(op, failargs)
+
+        if resloc:
+            mc.load(resloc, r.SCRATCH, 0)
+        mc.LGHI(r.SCRATCH2, l.imm(0))
+        mc.SG(r.SCRATCH2, l.addr(0, r.SCRATCH))
+        mc.SG(r.SCRATCH2, l.addr(diff, r.SCRATCH))
+
+
 class MemoryOpAssembler(object):
     _mixin_ = True
 
diff --git a/rpython/jit/backend/zarch/regalloc.py 
b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -1031,6 +1031,15 @@
         locs = self._prepare_guard(op)
         return locs
 
+    def prepare_guard_exception(self, op):
+        loc = self.ensure_reg(op.getarg(0))
+        if op in self.longevity:
+            resloc = self.force_allocate_reg(op)
+        else:
+            resloc = None
+        arglocs = self._prepare_guard(op, [loc, resloc])
+        return arglocs
+
     def prepare_copystrcontent(self, op):
         src_ptr_loc = self.ensure_reg(op.getarg(0), force_in_reg=True)
         dst_ptr_loc = self.ensure_reg(op.getarg(1), force_in_reg=True)
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