Author: Richard Plangger <[email protected]>
Branch: s390x-backend
Changeset: r81576:c137a0a35416
Date: 2016-01-05 13:15 +0100
http://bitbucket.org/pypy/pypy/changeset/c137a0a35416/
Log: prevent the base loc register to be in pool
diff --git a/rpython/jit/backend/zarch/opassembler.py
b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -807,6 +807,8 @@
def _emit_gc_load(self, op, arglocs, regalloc):
result_loc, base_loc, ofs_loc, size_loc, sign_loc = arglocs
+ assert not result_loc.is_in_pool()
+ assert not base_loc.is_in_pool()
assert not ofs_loc.is_in_pool()
if ofs_loc.is_imm():
assert self._mem_offset_supported(ofs_loc.value)
@@ -821,6 +823,9 @@
def _emit_gc_load_indexed(self, op, arglocs, regalloc):
result_loc, base_loc, index_loc, offset_loc, size_loc, sign_loc
=arglocs
+ assert not result_loc.is_in_pool()
+ assert not base_loc.is_in_pool()
+ assert not index_loc.is_in_pool()
assert not offset_loc.is_in_pool()
if offset_loc.is_imm() and
self._mem_offset_supported(offset_loc.value):
addr_loc = l.addr(offset_loc.value, base_loc, index_loc)
@@ -836,6 +841,7 @@
def emit_gc_store(self, op, arglocs, regalloc):
(base_loc, index_loc, value_loc, size_loc) = arglocs
+ assert not base_loc.is_in_pool()
assert not index_loc.is_in_pool()
if index_loc.is_imm() and self._mem_offset_supported(index_loc.value):
addr_loc = l.addr(index_loc.value, base_loc)
@@ -849,6 +855,8 @@
def emit_gc_store_indexed(self, op, arglocs, regalloc):
(base_loc, index_loc, value_loc, offset_loc, size_loc) = arglocs
+ assert not base_loc.is_in_pool()
+ assert not index_loc.is_in_pool()
addr_loc = self._load_address(base_loc, index_loc, offset_loc,
r.SCRATCH)
if value_loc.is_in_pool():
self.mc.LG(r.SCRATCH2, value_loc)
diff --git a/rpython/jit/backend/zarch/regalloc.py
b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -802,7 +802,7 @@
def prepare_gc_store_indexed(self, op):
args = op.getarglist()
- base_loc = self.ensure_reg(op.getarg(0))
+ base_loc = self.ensure_reg(op.getarg(0), force_in_reg=True)
index_loc = self.ensure_reg_or_any_imm(op.getarg(1))
value_loc = self.ensure_reg(op.getarg(2))
scale_box = op.getarg(3)
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