Author: Richard Plangger <planri...@gmail.com>
Branch: s390x-backend
Changeset: r81927:3430d1f200fa
Date: 2016-01-25 11:02 +0100
http://bitbucket.org/pypy/pypy/changeset/3430d1f200fa/
Log: removed lldebug properties from test translation (left them for
debugging), fixed a bug when Const arg is provided to
force_allocate_reg, it could have consumed on of the forbidden_vars
diff --git a/rpython/jit/backend/llsupport/test/test_zrpy_gc_direct.py
b/rpython/jit/backend/llsupport/test/test_zrpy_gc_direct.py
--- a/rpython/jit/backend/llsupport/test/test_zrpy_gc_direct.py
+++ b/rpython/jit/backend/llsupport/test/test_zrpy_gc_direct.py
@@ -26,7 +26,6 @@
t = TranslationContext()
t.config.translation.gc = "minimark"
t.config.translation.gcremovetypeptr = gcremovetypeptr
- t.config.translation.lldebug = True
ann = t.buildannotator()
ann.build_types(main, [s_list_of_strings], main_entry_point=True)
rtyper = t.buildrtyper()
diff --git a/rpython/jit/backend/llsupport/test/zrpy_gc_test.py
b/rpython/jit/backend/llsupport/test/zrpy_gc_test.py
--- a/rpython/jit/backend/llsupport/test/zrpy_gc_test.py
+++ b/rpython/jit/backend/llsupport/test/zrpy_gc_test.py
@@ -84,7 +84,6 @@
#
t = TranslationContext()
t.config.translation.gc = gc
- t.config.translation.lldebug = True # pretty useful when debugging assembly
if gc != 'boehm':
t.config.translation.gcremovetypeptr = True
for name, value in kwds.items():
diff --git a/rpython/jit/backend/zarch/arch.py
b/rpython/jit/backend/zarch/arch.py
--- a/rpython/jit/backend/zarch/arch.py
+++ b/rpython/jit/backend/zarch/arch.py
@@ -29,12 +29,12 @@
#
#
-THREADLOCAL_BYTES = 8
+# THREADLOCAL_BYTES = 8
# in reverse order to SP
STD_FRAME_SIZE_IN_BYTES = 160
-THREADLOCAL_ADDR_OFFSET = 8
+THREADLOCAL_ADDR_OFFSET = 16 # at position of r2, but r2 is never saved!!
assert STD_FRAME_SIZE_IN_BYTES % 2 == 0
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -199,7 +199,7 @@
#
mc.STMG(r.r10, r.r12, l.addr(10*WORD, r.SP))
mc.STG(r.r2, l.addr(2*WORD, r.SP))
- mc.STD(r.f0, l.addr(3*WORD, r.SP)) # slot of r3 is not used here
+ mc.STD(r.f0, l.addr(16*WORD, r.SP))
saved_regs = None
saved_fp_regs = None
else:
@@ -231,11 +231,11 @@
# Note: if not 'for_frame', argument_loc is r0, which must carefully
# not be overwritten above
mc.STG(r.SP, l.addr(0, r.SP)) # store the backchain
- mc.AGHI(r.SP, l.imm(-STD_FRAME_SIZE_IN_BYTES))
+ mc.push_std_frame()
mc.load_imm(mc.RAW_CALL_REG, func)
mc.LGR(r.r2, argument_loc)
mc.raw_call()
- mc.AGHI(r.SP, l.imm(STD_FRAME_SIZE_IN_BYTES))
+ mc.pop_std_frame()
if for_frame:
self._restore_exception(mc, RCS2, RCS3)
@@ -251,7 +251,7 @@
if for_frame:
mc.LMG(r.r10, r.r12, l.addr(10*WORD, r.SP))
mc.LG(r.r2, l.addr(2*WORD, r.SP))
- mc.LD(r.f0, l.addr(3*WORD, r.SP)) # slot of r3 is not used here
+ mc.LD(r.f0, l.addr(16*WORD, r.SP))
else:
self._pop_core_regs_from_jitframe(mc, saved_regs)
self._pop_fp_regs_from_jitframe(mc, saved_fp_regs)
@@ -516,13 +516,13 @@
# registers).
mc = InstrBuilder()
#
- self._push_core_regs_to_jitframe(mc, [r.r14]) # store the link on the
jit frame
- # Do the call
+ # store the link backwards
+ self.mc.STMG(r.r14, r.r15, l.addr(14*WORD, r.SP))
mc.push_std_frame()
+
mc.LGR(r.r2, r.SP)
mc.load_imm(mc.RAW_CALL_REG, slowpathaddr)
mc.raw_call()
- mc.pop_std_frame()
#
# Check if it raised StackOverflow
mc.load_imm(r.SCRATCH, self.cpu.pos_exception())
@@ -531,9 +531,11 @@
# else we have an exception
mc.cmp_op(r.SCRATCH, l.imm(0), imm=True)
#
- self._pop_core_regs_from_jitframe(mc, [r.r14]) # restore the link on
the jit frame
+ size = STD_FRAME_SIZE_IN_BYTES
+ self.mc.LMG(r.r14, r.r15, l.addr(size+14*WORD, r.SP)) # restore the
link
# So we return to our caller, conditionally if "EQ"
mc.BCR(c.EQ, r.r14)
+ mc.trap() # debug if this is EVER executed!
#
# Else, jump to propagate_exception_path
assert self.propagate_exception_path
@@ -565,6 +567,7 @@
jmp_pos = self.mc.currpos()
self.mc.reserve_cond_jump()
+ mc.push_std_frame()
mc.load_imm(r.r14, self.stack_check_slowpath)
mc.BASR(r.r14, r.r14)
@@ -1006,6 +1009,9 @@
# save r3, the second argument, to THREADLOCAL_ADDR_OFFSET
self.mc.STG(r.r3, l.addr(THREADLOCAL_ADDR_OFFSET, r.SP))
+ # push a standard frame for any call
+ self.mc.push_std_frame()
+
# move the first argument to SPP: the jitframe object
self.mc.LGR(r.SPP, r.r2)
@@ -1049,30 +1055,10 @@
self._call_footer_shadowstack(gcrootmap)
# restore registers r6-r15
- self.mc.LMG(r.r6, r.r15, l.addr(6*WORD, r.SP))
+ size = STD_FRAME_SIZE_IN_BYTES
+ self.mc.LMG(r.r6, r.r15, l.addr(size+6*WORD, r.SP))
self.jmpto(r.r14)
- def _push_all_regs_to_frame(self, mc, ignored_regs, withfloats,
callee_only=False):
- # Push all general purpose registers
- base_ofs = self.cpu.get_baseofs_of_frame_field()
- if callee_only:
- regs = gpr_reg_mgr_cls.save_around_call_regs
- else:
- regs = gpr_reg_mgr_cls.all_regs
- for gpr in regs:
- if gpr not in ignored_regs:
- v = gpr_reg_mgr_cls.all_reg_indexes[gpr.value]
- mc.MOV_br(v * WORD + base_ofs, gpr.value)
- if withfloats:
- if IS_X86_64:
- coeff = 1
- else:
- coeff = 2
- # Push all XMM regs
- ofs = len(gpr_reg_mgr_cls.all_regs)
- for i in range(len(xmm_reg_mgr_cls.all_regs)):
- mc.MOVSD_bx((ofs + i * coeff) * WORD + base_ofs, i)
-
def _push_core_regs_to_jitframe(self, mc, includes=r.registers):
self._multiple_to_or_from_jitframe(mc, includes, store=True)
diff --git a/rpython/jit/backend/zarch/callbuilder.py
b/rpython/jit/backend/zarch/callbuilder.py
--- a/rpython/jit/backend/zarch/callbuilder.py
+++ b/rpython/jit/backend/zarch/callbuilder.py
@@ -62,7 +62,6 @@
# called function will in turn call further functions (which must be
passed the
# address of the new frame). This stack grows downwards from high
addresses
# """
- self.subtracted_to_sp = STD_FRAME_SIZE_IN_BYTES
gpr_regs = 0
fpr_regs = 0
@@ -151,7 +150,8 @@
# save the SP back chain
self.mc.STG(r.SP, l.addr(-self.subtracted_to_sp, r.SP))
# move the frame pointer
- self.mc.LAY(r.SP, l.addr(-self.subtracted_to_sp, r.SP))
+ if self.subtracted_to_sp != 0:
+ self.mc.LAY(r.SP, l.addr(-self.subtracted_to_sp, r.SP))
self.mc.raw_call()
#
self.ensure_correct_signzero_extension()
@@ -180,7 +180,8 @@
def restore_stack_pointer(self):
# it must at LEAST be 160 bytes
- self.mc.LAY(r.SP, l.addr(self.subtracted_to_sp, r.SP))
+ if self.subtracted_to_sp != 0:
+ self.mc.LAY(r.SP, l.addr(self.subtracted_to_sp, r.SP))
def load_result(self):
assert (self.resloc is None or
diff --git a/rpython/jit/backend/zarch/regalloc.py
b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -138,9 +138,9 @@
poolloc = l.pool(offset)
if force_in_reg:
if selected_reg is None:
- tmp = TempVar()
+ tmp = TempInt()
+ selected_reg = self.force_allocate_reg(tmp,
forbidden_vars=self.temp_boxes)
self.temp_boxes.append(tmp)
- selected_reg = self.force_allocate_reg(tmp)
self.assembler.mc.LG(selected_reg, poolloc)
return selected_reg
return poolloc
@@ -152,7 +152,7 @@
return loc
def get_scratch_reg(self):
- box = TempVar()
+ box = TempInt()
reg = self.force_allocate_reg(box, forbidden_vars=self.temp_boxes)
self.temp_boxes.append(box)
return reg
@@ -465,7 +465,8 @@
# else, return a regular register (not SPP).
if self.rm.reg_bindings.get(var, None) is not None:
return self.rm.loc(var, must_exist=True)
- return self.rm.force_allocate_reg(var)
+ forbidden_vars = self.rm.temp_boxes
+ return self.rm.force_allocate_reg(var, forbidden_vars)
def walk_operations(self, inputargs, operations):
from rpython.jit.backend.zarch.assembler import (
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